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| author | Joseph Lo <josephl@nvidia.com> | 2014-12-09 15:11:54 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-05-18 13:16:26 +0200 |
| commit | b7d0ffd1edb358c089c0fe94711aac65eeb81d6a (patch) | |
| tree | 972780c79afbc4312feed40f0742829bb6ed4a10 /src/arch/arm64/include | |
| parent | 2e0425986fb1b5d4d5b57b2e2b7f5442e9823b0c (diff) | |
| download | coreboot-b7d0ffd1edb358c089c0fe94711aac65eeb81d6a.tar.xz | |
arm64: psci: add cpu_suspend support
Implement the cpu_suspend for the PSCI service in secmon.
BRANCH=none
BUG=chrome-os-partner:39620
TEST=test with CPU idle driver that invoke the cpu_suspend of PSCI
Change-Id: I4cdfab88bf36bf432fb33c56c1ea114b384528f8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 90b3ea3fcb21cb393e30a8359f0328054961f6d5
Original-Change-Id: Ieb76abc017b9c3e074cc018903cef72020306a8f
Original-Signed-off-by: Joseph Lo <josephl@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/269115
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10171
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm64/include')
| -rw-r--r-- | src/arch/arm64/include/arch/psci.h | 36 |
1 files changed, 35 insertions, 1 deletions
diff --git a/src/arch/arm64/include/arch/psci.h b/src/arch/arm64/include/arch/psci.h index 47c902828c..1c28dc45da 100644 --- a/src/arch/arm64/include/arch/psci.h +++ b/src/arch/arm64/include/arch/psci.h @@ -24,6 +24,25 @@ #include <arch/cpu.h> #include <arch/smc.h> +/* PSCI v0.2 power state encoding for CPU_SUSPEND function */ +#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff +#define PSCI_0_2_POWER_STATE_ID_SHIFT 0 +#define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 +#define PSCI_0_2_POWER_STATE_TYPE_MASK \ + (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) +#define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 +#define PSCI_0_2_POWER_STATE_AFFL_MASK \ + (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) + +#define PSCI_POWER_STATE_TYPE_STANDBY 0 +#define PSCI_POWER_STATE_TYPE_POWER_DOWN 1 + +struct psci_power_state { + u16 id; + u8 type; + u8 affinity_level; +}; + /* Return Values */ enum { PSCI_RET_SUCCESS = 0, @@ -64,6 +83,7 @@ struct psci_node; struct psci_cpu_state { struct cpu_info *ci; struct cpu_action startup; + struct cpu_action resume; /* Ancestor of target to update state in CPU_ON case. */ struct psci_node *ancestor; }; @@ -107,7 +127,8 @@ static inline int psci_root_node(const struct psci_node *n) enum { PSCI_CMD_ON, PSCI_CMD_OFF, - PSCI_CMD_STANDBY, + PSCI_CMD_SUSPEND, + PSCI_CMD_RESUME, }; /* @@ -127,6 +148,7 @@ struct psci_cmd { * A value of -1 indicates a CPU_OFF request. */ int state_id; + struct psci_power_state *state; /* * target is the command's target, but it can affect up to the * ancestor entity. If target == ancestor then it only affects @@ -184,6 +206,18 @@ struct psci_func { struct smc_call *smc; }; +static inline void psci_power_state_unpack(uint32_t power_state, + struct psci_power_state *state) +{ + state->id = (power_state & PSCI_0_2_POWER_STATE_ID_MASK) >> + PSCI_0_2_POWER_STATE_ID_SHIFT; + state->type = (power_state & PSCI_0_2_POWER_STATE_TYPE_MASK) >> + PSCI_0_2_POWER_STATE_TYPE_SHIFT; + state->affinity_level = + (power_state & PSCI_0_2_POWER_STATE_AFFL_MASK) >> + PSCI_0_2_POWER_STATE_AFFL_SHIFT; +} + static inline void psci_func_init(struct psci_func *pf, struct smc_call *smc) { pf->id = smc_function_id(smc); |