arm64: tegra132: tegra210: Remove old arm64/stage_entry.S

This patch removes the old arm64/stage_entry.S code that was too
specific to the Tegra SoC boot flow, and replaces it with code that
hides the peculiarities of switching to a different CPU/arch in ramstage
in the Tegra SoC directories.

BRANCH=None
BUG=None
TEST=Built Ryu and Smaug. !!!UNTESTED!!!

Change-Id: Ib3a0448b30ac9c7132581464573efd5e86e03698
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/12078
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

4 files changed, 4 insertions, 26 deletions

diff --git a/src/arch/arm64/include/arch/memlayout.h b/src/arch/arm64/include/arch/memlayout.h
index 6db67a9dee..0bd0835aa8 100644
--- a/src/arch/arm64/include/arch/memlayout.h
+++ b/src/arch/arm64/include/arch/memlayout.h
@@ -23,13 +23,8 @@
 	_ = ASSERT(size % 4K == 0, "TTB size must be divisible by 4K!");
 
 /* ARM64 stacks need 16-byte alignment. */
-#if !(IS_ENABLED(CONFIG_SOC_NVIDIA_TEGRA132) || \
-      IS_ENABLED(CONFIG_SOC_NVIDIA_TEGRA210))
 #define STACK(addr, size) \
 	REGION(stack, addr, size, 16) \
 	_ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
-#else	/* Hack around old Tegra stage_entry.S implementation. TODO: remove */
-#define STACK(addr, size) REGION(preram_stack, addr, size, 16)
-#endif
 
 #endif /* __ARCH_MEMLAYOUT_H */
diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h
index 0d6606f389..6dbf389001 100644
--- a/src/arch/arm64/include/arch/stages.h
+++ b/src/arch/arm64/include/arch/stages.h
@@ -24,9 +24,4 @@ void stage_entry(void);
 void stage_exit(void *);
 void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
 
-/* This function is called upon initial entry of each stage. It is called prior
- * to main(). That means all of the common infrastructure will most likely not
- * be available to be used (such as console). */
-void arm64_soc_init(void);
-
 #endif
diff --git a/src/arch/arm64/include/armv8/arch/cpu.h b/src/arch/arm64/include/armv8/arch/cpu.h
index fdc34e5086..6e096cc8e6 100644
--- a/src/arch/arm64/include/armv8/arch/cpu.h
+++ b/src/arch/arm64/include/armv8/arch/cpu.h
@@ -20,18 +20,6 @@
 
 static inline unsigned int smp_processor_id(void) { return 0; }
 
-/*
- * The arm64_cpu_startup() initializes CPU's exception stack and regular
- * stack as well initializing the C environment for the processor. Finally it
- * calls into c_entry.
- */
-void arm64_cpu_startup(void);
-
-/*
- * The arm64_arch_timer_init() initializes the CPU's cntfrq register of
- * ARM arch timer.
- */
-void arm64_arch_timer_init(void);
 
 #if !defined(__PRE_RAM__)
 struct cpu_driver { };
diff --git a/src/arch/arm64/include/armv8/arch/lib_helpers.h b/src/arch/arm64/include/armv8/arch/lib_helpers.h
index 6dd33b352f..51a754a8af 100644
--- a/src/arch/arm64/include/armv8/arch/lib_helpers.h
+++ b/src/arch/arm64/include/armv8/arch/lib_helpers.h
@@ -58,10 +58,10 @@
 #define SCR_EA_MASK          (1 << SCR_EA_SHIFT)
 #define SCR_EA_ENABLE        (1 << SCR_EA_SHIFT)
 #define SCR_EA_DISABLE       (0 << SCR_EA_SHIFT)
-#define SCR_SMC_SHIFT        7
-#define SCR_SMC_MASK         (1 << SCR_SMC_SHIFT)
-#define SCR_SMC_DISABLE      (1 << SCR_SMC_SHIFT)
-#define SCR_SMC_ENABLE       (0 << SCR_SMC_SHIFT)
+#define SCR_SMD_SHIFT        7
+#define SCR_SMD_MASK         (1 << SCR_SMD_SHIFT)
+#define SCR_SMD_DISABLE      (1 << SCR_SMD_SHIFT)
+#define SCR_SMD_ENABLE       (0 << SCR_SMD_SHIFT)
 #define SCR_HVC_SHIFT        8
 #define SCR_HVC_MASK         (1 << SCR_HVC_SHIFT)
 #define SCR_HVC_DISABLE      (0 << SCR_HVC_SHIFT)