summaryrefslogtreecommitdiff
path: root/src/arch/arm64/include
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2014-09-16 22:23:57 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-03-28 07:05:34 +0100
commit4f89d97c06b7e45fb6f3c26e770b0c674a82bb4d (patch)
treed73e4cd8955135b2be8403296643623d0d64b191 /src/arch/arm64/include
parentda1a0778ab27b1b6feffbacaed9aa010b9ab1df1 (diff)
downloadcoreboot-4f89d97c06b7e45fb6f3c26e770b0c674a82bb4d.tar.xz
arm64: exception handler registration
In order to build upon the arm64 exception handlers need to be registered. This provides very basic support to register a handler for a specific exception vector. BUG=chrome-os-partner:30785 BRANCH=None TEST=Built and booted into kernel. Change-Id: If046f0736765a2efeb23201c1d2d1f7f7db47dd2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a82e5e8d5900ebef16abdb68701be6beeb9ca13a Original-Change-Id: I0f68a48101ff48d582f5422871b9e7e5164357e4 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/218650 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9088 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm64/include')
-rw-r--r--src/arch/arm64/include/arch/transition.h18
-rw-r--r--src/arch/arm64/include/armv8/arch/exception.h31
2 files changed, 49 insertions, 0 deletions
diff --git a/src/arch/arm64/include/arch/transition.h b/src/arch/arm64/include/arch/transition.h
index e8ded5f2aa..9da6b36b87 100644
--- a/src/arch/arm64/include/arch/transition.h
+++ b/src/arch/arm64/include/arch/transition.h
@@ -42,6 +42,24 @@
#define STACK_POP_BYTES 16
#define STACK_PUSH_BYTES -16
+#define EXC_VID_CUR_SP_EL0_SYNC 0
+#define EXC_VID_CUR_SP_EL0_IRQ 1
+#define EXC_VID_CUR_SP_EL0_FIRQ 2
+#define EXC_VID_CUR_SP_EL0_SERR 3
+#define EXC_VID_CUR_SP_ELX_SYNC 4
+#define EXC_VID_CUR_SP_ELX_IRQ 5
+#define EXC_VID_CUR_SP_ELX_FIQ 6
+#define EXC_VID_CUR_SP_ELX_SERR 7
+#define EXC_VID_LOW64_SYNC 8
+#define EXC_VID_LOW64_IRQ 9
+#define EXC_VID_LOW64_FIQ 10
+#define EXC_VID_LOW64_SERR 11
+#define EXC_VID_LOW32_SYNC 12
+#define EXC_VID_LOW32_IRQ 13
+#define EXC_VID_LOW32_FIQ 14
+#define EXC_VID_LOW32_SERR 15
+#define NUM_EXC_VIDS 16
+
#ifndef __ASSEMBLY__
#include <stdint.h>
diff --git a/src/arch/arm64/include/armv8/arch/exception.h b/src/arch/arm64/include/armv8/arch/exception.h
index 11ffcb61f6..49ea747700 100644
--- a/src/arch/arm64/include/armv8/arch/exception.h
+++ b/src/arch/arm64/include/armv8/arch/exception.h
@@ -30,8 +30,39 @@
#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
+#include <arch/transition.h>
+
/* Initialize the exception handling on the current CPU. */
void exception_hwinit(void);
void exception_init(void);
+/*
+ * Order matters for handling return values. The larger the value the higher
+ * the precedence.
+ */
+enum {
+ EXC_RET_IGNORED,
+ EXC_RET_ABORT,
+ EXC_RET_HANDLED,
+ EXC_RET_HANDLED_DUMP_STATE,
+};
+
+struct exception_handler {
+ int (*handler)(struct exc_state *state, uint64_t vector_id);
+ struct exception_handler *next;
+};
+
+
+/*
+ * Register a handler provided with the associated vector id. Returns 0 on
+ * sucess, < 0 on error. Note that registration is not thread/interrupt safe.
+ */
+int exception_handler_register(uint64_t vid, struct exception_handler *h);
+
+/*
+ * Unregister a handler from the vector id. Return 0 on success, < 0 on error.
+ * Note that the unregistration is not thread/interrupt safe.
+ */
+int exception_handler_unregister(uint64_t vid, struct exception_handler *h);
+
#endif