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author | Aaron Durbin <adurbin@chromium.org> | 2014-10-28 15:38:17 -0500 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-09 14:40:13 +0200 |
commit | b777f3e3d1cb4265f1a4bf392781b93bd0c37eea (patch) | |
tree | 76fb64e2714b8dc9822b25a24d80b17e68890f58 /src/arch/arm64/transition.c | |
parent | 7d62ad05fb7e1bc1f38c609709e600c76f6b1d34 (diff) | |
download | coreboot-b777f3e3d1cb4265f1a4bf392781b93bd0c37eea.tar.xz |
arm64: psci: add node hierarchy
In order to properly support more arm64 SoCs PSCI needs
to handle the hierarchy of cpus/clusters within the SoC.
The nodes within PSCI are kept in a tree as well as
a depth-first ordered array of same tree. Additionally,
the PSCI states are now maintained in a hierachal manner.
OFF propogates up the tree as long as all siblings are
set to OFF. ON propogates up the tree until a node is
not already set to OFF.
The SoC provides the operations for determining how many
children are at a given affinity level. Lastly, the
secmon startup has been reworked in that all non-BSP CPUs
wait for instructions from the BSP.
BUG=chrome-os-partner:32136
BRANCH=None
TEST=Can still boot into kernel with SMP.
Change-Id: I036fabaf0f1cefa2841264c47e4092c75a2ff4dc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 721d408cd110e1b56d38789177b740aa0e54ca33
Original-Change-Id: I520a9726e283bee7edcb514cda28ec1eb31b5ea0
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/226480
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9390
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/arm64/transition.c')
0 files changed, 0 insertions, 0 deletions