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authorStephen Douthit <stephend@silicom-usa.com>2019-08-02 17:05:03 -0400
committerPatrick Georgi <pgeorgi@google.com>2020-03-10 20:31:33 +0000
commit2c18ba5bd7e279cd9e55fcfc93c180d52296a374 (patch)
tree2d7292616259f08ed4316d714934c488a13066a2 /src/arch/arm
parent54e9894353ec2c6e635bead94a94953db069d49d (diff)
downloadcoreboot-2c18ba5bd7e279cd9e55fcfc93c180d52296a374.tar.xz
soc/intel/dnv: Don't clobber SATA_MAP while trying to set mode
SATA Mode Select is bit 16 of the SATA General Configuration register. This code currently incorrectly pokes at the Port Clock Disable bits in the Port Mapping Register, and without clock the affected ports can't link. Change-Id: I37104f520a869bd45a32cfd271d0b893aec3c8ed Signed-off-by: Stephen Douthit <stephend@silicom-usa.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Vanessa Eusebio <vanessa.f.eusebio@intel.com> Reviewed-by: David Guckian Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/arm')
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