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| author | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-20 14:13:01 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-21 01:10:18 +0100 |
| commit | c8fadd9f465428cb2470d78c72b77766acb058d9 (patch) | |
| tree | b49fe740759d2541b386bbc65b2173325e4b767f /src/arch/armv7/boot | |
| parent | a8ae1c66f919a41c8756d0cdb09a77243d1121eb (diff) | |
| download | coreboot-c8fadd9f465428cb2470d78c72b77766acb058d9.tar.xz | |
ARMV7: create a correct LB_SERIAL table entry
If CONFIG_CONSOLE_SERIAL is set, and we can call the standard function
and get a non-zero uart address, then we create an lb table entry.
The code was mostly right, just needed a tweak.
Change-Id: I5b36c7b4e580a23319b7ba92cc8ad61592b1757a
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2466
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/arch/armv7/boot')
| -rw-r--r-- | src/arch/armv7/boot/coreboot_table.c | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/src/arch/armv7/boot/coreboot_table.c b/src/arch/armv7/boot/coreboot_table.c index 044f3d51e0..2810a5e990 100644 --- a/src/arch/armv7/boot/coreboot_table.c +++ b/src/arch/armv7/boot/coreboot_table.c @@ -110,18 +110,7 @@ static struct lb_memory *lb_memory(struct lb_header *header) static struct lb_serial *lb_serial(struct lb_header *header) { -#if CONFIG_CONSOLE_SERIAL8250 - struct lb_record *rec; - struct lb_serial *serial; - rec = lb_new_record(header); - serial = (struct lb_serial *)rec; - serial->tag = LB_TAG_SERIAL; - serial->size = sizeof(*serial); - serial->type = LB_SERIAL_TYPE_IO_MAPPED; - serial->baseaddr = CONFIG_TTYS0_BASE; - serial->baud = CONFIG_TTYS0_BAUD; - return serial; -#elif CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL if (uartmem_getbaseaddr()) { struct lb_record *rec; struct lb_serial *serial; |