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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-12-07 17:15:04 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-12-08 06:53:19 +0100
commit52db0b984523047da19ca3b41558b9dbf45abad7 (patch)
tree5ed389bb233d5b007593ede56040ccf268e37bbe /src/arch/armv7/lib/id.inc
parent509f77277cfccdae897f0d369672ce0818ecdf88 (diff)
downloadcoreboot-52db0b984523047da19ca3b41558b9dbf45abad7.tar.xz
WIP: Initial ARMv7 architecture implementation in coreboot
The first ARMv7 CPU we're going to support is the Exynos 5250 used in the Google Snow ChromeBook. Change-Id: I4de8433bbc6202eb8fef2556a11186a3376d411b Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2004 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/armv7/lib/id.inc')
-rw-r--r--src/arch/armv7/lib/id.inc18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/arch/armv7/lib/id.inc b/src/arch/armv7/lib/id.inc
new file mode 100644
index 0000000000..4da7024233
--- /dev/null
+++ b/src/arch/armv7/lib/id.inc
@@ -0,0 +1,18 @@
+ .section ".id", "a", %progbits
+
+ .globl __id_start
+__id_start:
+ver:
+ .asciz COREBOOT_VERSION
+vendor:
+ .asciz CONFIG_MAINBOARD_VENDOR
+part:
+ .asciz CONFIG_MAINBOARD_PART_NUMBER
+.long __id_end + CONFIG_ID_SECTION_OFFSET - ver /* Reverse offset to the vendor id */
+.long __id_end + CONFIG_ID_SECTION_OFFSET - vendor /* Reverse offset to the vendor id */
+.long __id_end + CONFIG_ID_SECTION_OFFSET - part /* Reverse offset to the part number */
+.long CONFIG_ROM_SIZE /* Size of this romimage */
+ .globl __id_end
+
+__id_end:
+.previous