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authorStefan Reinauer <reinauer@chromium.org>2013-05-29 13:12:20 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 21:50:14 +0200
commitff7c8e82d10a48f7d123755b33bef9ffbf01d90d (patch)
treebb4207b47f05601ca08dd9320557069f553a3e1d /src/arch/armv7
parente6a44ebb29d7fb9ac6bbef0db4bd0e3100a72f55 (diff)
downloadcoreboot-ff7c8e82d10a48f7d123755b33bef9ffbf01d90d.tar.xz
armv7a: Enable native memcpy / memset
The code has been there for quite a while but was never enabled. Change-Id: I4ec3dcbb3c03805ac5c75872614e5d394df667cf Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3675 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/armv7')
-rw-r--r--src/arch/armv7/Kconfig8
-rw-r--r--src/arch/armv7/Makefile.inc9
2 files changed, 15 insertions, 2 deletions
diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig
index 7f4d75e270..633c5ef98d 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/armv7/Kconfig
@@ -32,4 +32,12 @@ config UPDATE_IMAGE
is a suitable file for further processing.
The bootblock will not be modified.
+config HAVE_ARCH_MEMSET
+ bool
+ default y
+
+config HAVE_ARCH_MEMCPY
+ bool
+ default y
+
endmenu
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 1a328c4f18..31410e3d54 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -172,8 +172,6 @@ romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
ramstage-y += div0.c
#ramstage-y += interrupts.c
-#ramstage-y += memcpy.S
-#ramstage-y += memset.S
ramstage-y += cache.c
ramstage-y += mmu.c
@@ -184,6 +182,13 @@ bootblock-y += eabi_compat.c
ramstage-y += boot.c
ramstage-y += tables.c
+romstage-y += memset.S
+ramstage-y += memset.S
+bootblock-y += memset.S
+romstage-y += memcpy.S
+ramstage-y += memcpy.S
+bootblock-y += memcpy.S
+
$(obj)/arch/armv7/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
romstage-srcs += $(objgenerated)/crt0.s