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authorStefan Reinauer <reinauer@chromium.org>2013-02-14 15:56:08 -0800
committerDavid Hendricks <dhendrix@chromium.org>2013-02-15 01:40:34 +0100
commit7512e4593ed535bdd1bc33a91dfb769566146a39 (patch)
tree3623faa1326703eb5166a74a6c4fc537791cc576 /src/arch/armv7
parent0663dfd3d5a64a0da3bf9114c0e8cb981d52871f (diff)
downloadcoreboot-7512e4593ed535bdd1bc33a91dfb769566146a39.tar.xz
ARMv7: Drop sr32, and wait_on_value
They're unused. Also drop some unused defines in system.h Change-Id: Ia5afc3a676a4a94787041430f05d08f333033c73 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2404 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/armv7')
-rw-r--r--src/arch/armv7/include/system.h19
-rw-r--r--src/arch/armv7/lib/syslib.c31
2 files changed, 2 insertions, 48 deletions
diff --git a/src/arch/armv7/include/system.h b/src/arch/armv7/include/system.h
index ddbab892a0..053df8df38 100644
--- a/src/arch/armv7/include/system.h
+++ b/src/arch/armv7/include/system.h
@@ -2,17 +2,6 @@
#ifndef SYSTEM_H_
#define SYSTEM_H_
-#define CPU_ARCH_UNKNOWN 0
-#define CPU_ARCH_ARMv3 1
-#define CPU_ARCH_ARMv4 2
-#define CPU_ARCH_ARMv4T 3
-#define CPU_ARCH_ARMv5 4
-#define CPU_ARCH_ARMv5T 5
-#define CPU_ARCH_ARMv5TE 6
-#define CPU_ARCH_ARMv5TEJ 7
-#define CPU_ARCH_ARMv6 8
-#define CPU_ARCH_ARMv7 9
-
/*
* CR1 bits (CP#15 CR1)
*/
@@ -111,13 +100,9 @@ void mmu_setup(unsigned long start, unsigned long size);
void arm_init_before_mmu(void);
/*
- * FIXME: sdelay, sr32, and wait_on_value originally came from
- * arch/arm/cpu/armv7/exynos5/setup.h in u-boot but do not seem
- * specific to exynos5...
+ * FIXME: sdelay originally came from arch/arm/cpu/armv7/exynos5/setup.h in
+ * u-boot but does not seem specific to exynos5...
*/
void sdelay(unsigned long loops);
-void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value);
-u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
- u32 bound);
#endif // __ASSEMBLY__
#endif /* SYSTEM_H_ */
diff --git a/src/arch/armv7/lib/syslib.c b/src/arch/armv7/lib/syslib.c
index 6f38bf9679..a6ed080157 100644
--- a/src/arch/armv7/lib/syslib.c
+++ b/src/arch/armv7/lib/syslib.c
@@ -21,7 +21,6 @@
* MA 02111-1307 USA
*/
-//#include <common.h>
#include <arch/io.h>
#include <system.h> /* FIXME: dumping ground for prototypes */
@@ -38,33 +37,3 @@ void sdelay(unsigned long loops)
"bne 1b":"=r" (loops):"0"(loops));
}
-/*****************************************************************
- * sr32 - clear & set a value in a bit range for a 32 bit address
- *****************************************************************/
-void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
-{
- u32 tmp, msk = 0;
- msk = 1 << num_bits;
- --msk;
- tmp = readl((u32)addr) & ~(msk << start_bit);
- tmp |= value << start_bit;
- writel(tmp, (u32)addr);
-}
-
-/*********************************************************************
- * wait_on_value() - common routine to allow waiting for changes in
- * volatile regs.
- *********************************************************************/
-u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
- u32 bound)
-{
- u32 i = 0, val;
- do {
- ++i;
- val = readl((u32)read_addr) & read_bit_mask;
- if (val == match_value)
- return 1;
- if (i == bound)
- return 0;
- } while (1);
-}