diff options
| author | Hung-Te Lin <hungte@chromium.org> | 2013-06-11 21:55:58 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 21:46:01 +0200 |
| commit | d63bddc4991d9ace037fd716b29c3f7253e9ac94 (patch) | |
| tree | 73903c59bb20a3e28e7b11eb59097df0459588c6 /src/arch/armv7 | |
| parent | 32ab283b1086ef53fadcd4be92df6e41c5d06438 (diff) | |
| download | coreboot-d63bddc4991d9ace037fd716b29c3f7253e9ac94.tar.xz | |
armv7: Reserve space BL1 and checksum header by specifying bootblock offset.
Not all ARM systems need "BL1", and the layout of BL* and bootblock may be
different (ex, Exynos 5250 may use a new BL1 with variable length checksum
header).
To support that better, define the real base address (and ROM offset) of boot
block, and then we can post-processing ROM image file by filling data / checksum
and any other information.
Change-Id: I0e3105e52500b6b457371ad33a9aa546acf28928
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3664
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/armv7')
| -rw-r--r-- | src/arch/armv7/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/arch/armv7/bootblock.inc | 8 | ||||
| -rw-r--r-- | src/arch/armv7/bootblock.lds | 3 |
3 files changed, 3 insertions, 11 deletions
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 27a0df6068..8474315458 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -48,7 +48,8 @@ prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) # TODO Change -b to Kconfig variable. $(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) $(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ - -B $(objcbfs)/bootblock.bin -a 64 -b 0x0000 \ + -B $(objcbfs)/bootblock.bin -a 64 \ + -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \ -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \ -o $(CONFIG_CBFS_ROM_OFFSET) @printf " CBFS $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc index bac32e21ff..b2c993af32 100644 --- a/src/arch/armv7/bootblock.inc +++ b/src/arch/armv7/bootblock.inc @@ -29,14 +29,6 @@ * MA 02111-1307 USA */ -.section ".bl1", "a", %progbits -_bl1: - /* For now we have to live with a first stage boot loader - * on ARM, which is 8KB in size and it is prepended to the - * reset vector - */ - .skip (CONFIG_BL1_SIZE_KB * 1024) - .section ".start", "a", %progbits .globl _start _start: b reset diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds index 6f6040dacb..837039653b 100644 --- a/src/arch/armv7/bootblock.lds +++ b/src/arch/armv7/bootblock.lds @@ -25,12 +25,11 @@ OUTPUT_ARCH(arm) TARGET(binary) SECTIONS { - ROMLOC = CONFIG_BOOTBLOCK_BASE - (CONFIG_BL1_SIZE_KB * 1024); + ROMLOC = CONFIG_BOOTBLOCK_BASE; /* This section might be better named .setup */ .rom ROMLOC : { _rom = .; - *(.bl1); *(.start); *(.id); *(.text); |