- First pass through with with device tree enhancement merge. Most of the mechanisms should

  be in place but don't expect anything to quite work yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

7 files changed, 17 insertions, 65 deletions

diff --git a/src/arch/i386/include/arch/hlt.h b/src/arch/i386/include/arch/hlt.h
index 86ed7c8f41..7d3a563734 100644
--- a/src/arch/i386/include/arch/hlt.h
+++ b/src/arch/i386/include/arch/hlt.h
@@ -9,7 +9,7 @@ static void hlt(void)
 
 #endif
 
-#ifdef __GNUC__
+#if defined(__GNUC__) && !defined(__ROMCC__)
 static inline void hlt(void)
 {
 	asm("hlt");
diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h
index 0d5f071428..80037bd7ad 100644
--- a/src/arch/i386/include/arch/romcc_io.h
+++ b/src/arch/i386/include/arch/romcc_io.h
@@ -191,6 +191,11 @@ static inline void pnp_set_iobase(device_t dev, unsigned index, unsigned iobase)
 	pnp_write_config(dev, index + 1, iobase & 0xff);
 }
 
+static inline uint16_t pnp_read_iobase(device_t dev, unsigned index)
+{
+	return (uint16_t)((pnp_read_config(dev, index) << 8) | pnp_read_config(dev, index + 1));
+}
+
 static inline void pnp_set_irq(device_t dev, unsigned index, unsigned irq)
 {
 	pnp_write_config(dev, index, irq);
diff --git a/src/arch/i386/include/arch/smp/lapic.h b/src/arch/i386/include/arch/smp/lapic.h
deleted file mode 100644
index 0ac87aa2d3..0000000000
--- a/src/arch/i386/include/arch/smp/lapic.h
+++ /dev/null
@@ -1,55 +0,0 @@
-#ifndef ARCH_SMP_LAPIC_H
-#define ARCH_SMP_LAPIC_H
-
-#include <cpu/p6/msr.h>
-#include <cpu/p6/apic.h>
-#include <arch/hlt.h>
-
-static void enable_lapic(void)
-{
-
-	msr_t msr;
-	msr = rdmsr(0x1b);
-	msr.hi &= 0xffffff00;
-	msr.lo &= 0x000007ff;
-	msr.lo |= APIC_DEFAULT_BASE | (1 << 11);
-	wrmsr(0x1b, msr);
-}
-
-static void disable_lapic(void)
-{
-	msr_t msr;
-	msr = rdmsr(0x1b);
-	msr.lo &= ~ (1 << 11);
-	wrmsr(0x1b, msr);
-}
-
-static inline unsigned long lapicid(void)
-{
-	return apic_read(APIC_ID) >> 24;
-}
-
-static void stop_this_cpu(void)
-{
-	unsigned apicid;
-	apicid = lapicid();
-
-	/* Send an APIC INIT to myself */
-	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
-	apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT);
-	/* Wait for the ipi send to finish */
-	apic_wait_icr_idle();
-
-	/* Deassert the APIC INIT */
-	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
-	apic_write(APIC_ICR,  APIC_INT_LEVELTRIG | APIC_DM_INIT);
-	/* Wait for the ipi send to finish */
-	apic_wait_icr_idle();
-
-	/* If I haven't halted spin forever */
-	for(;;) {
-		hlt();
-	}
-}
-
-#endif /* ARCH_SMP_LAPIC_H */
diff --git a/src/arch/i386/include/arch/smp/mpspec.h b/src/arch/i386/include/arch/smp/mpspec.h
index 66232c921d..9f22b7f4af 100644
--- a/src/arch/i386/include/arch/smp/mpspec.h
+++ b/src/arch/i386/include/arch/smp/mpspec.h
@@ -238,8 +238,7 @@ void smp_write_processor(struct mp_config_table *mc,
 	unsigned char apicid, unsigned char apicver,
 	unsigned char cpuflag, unsigned int cpufeature,
 	unsigned int featureflag);
-void smp_write_processors(struct mp_config_table *mc, 
-	unsigned long *processor_map);
+void smp_write_processors(struct mp_config_table *mc);
 void smp_write_bus(struct mp_config_table *mc,
 	unsigned char id, unsigned char *bustype);
 void smp_write_ioapic(struct mp_config_table *mc,
@@ -265,18 +264,15 @@ void smp_write_compatibility_address_space(struct mp_config_table *mc,
 	unsigned int range_list);
 unsigned char smp_compute_checksum(void *v, int len);
 void *smp_write_floating_table(unsigned long addr);
-unsigned long write_smp_table(unsigned long addr, unsigned long *processor_map);
+unsigned long write_smp_table(unsigned long addr);
 
 #else /* HAVE_MP_TABLE */
 static inline 
-unsigned long write_smp_table(unsigned long addr, unsigned long *processor_map)
+unsigned long write_smp_table(unsigned long addr);
 {
 	return addr;
 }
 #endif /* HAVE_MP_TABLE */
 
-/* A table (per mainboard) listing the initial apicid of each cpu. */
-extern unsigned long initial_apicid[CONFIG_MAX_CPUS];
-
 #endif
 
diff --git a/src/arch/i386/include/arch/smp/spinlock.h b/src/arch/i386/include/arch/smp/spinlock.h
index d0cc11c6a7..65ad8d0673 100644
--- a/src/arch/i386/include/arch/smp/spinlock.h
+++ b/src/arch/i386/include/arch/smp/spinlock.h
@@ -54,4 +54,10 @@ static inline void spin_unlock(spinlock_t *lock)
 		:"=m" (lock->lock) : : "memory");
 }
 
+/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
+static inline void cpu_relax(void)
+{
+	__asm__ __volatile__("rep;nop": : :"memory");
+}
+
 #endif /* ARCH_SMP_SPINLOCK_H */
diff --git a/src/arch/i386/include/stddef.h b/src/arch/i386/include/stddef.h
index 4bf6b0a867..e4fc019c87 100644
--- a/src/arch/i386/include/stddef.h
+++ b/src/arch/i386/include/stddef.h
@@ -8,7 +8,7 @@ typedef long ssize_t;
 typedef int wchar_t;
 typedef unsigned int wint_t;
 
-#define NULL 0
+#define NULL ((void *)0)
 
 #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
 
diff --git a/src/arch/i386/include/stdint.h b/src/arch/i386/include/stdint.h
index 0fc4346317..76bd89a354 100644
--- a/src/arch/i386/include/stdint.h
+++ b/src/arch/i386/include/stdint.h
@@ -1,7 +1,7 @@
 #ifndef I386_STDINT_H
 #define I386_STDINT_H
 
-#if defined(__GNUC__)
+#if defined(__GNUC__) && !defined(__ROMCC__)
 #define __HAVE_LONG_LONG__ 1
 #else
 #define __HAVE_LONG_LONG__ 0