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author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:17:25 +0000 |
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committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:17:25 +0000 |
commit | 6ca7636c8f52560e732cdd5b1c7829cda5aa2bde (patch) | |
tree | cc45ae7c4dea6e2c5338f52b4314106bf07023be /src/arch/i386/include | |
parent | b2ed53dd5669c2c3839633bd2b3b4af709a5b149 (diff) | |
download | coreboot-6ca7636c8f52560e732cdd5b1c7829cda5aa2bde.tar.xz |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator: Yinghai Lu <yhlu@tyan.com>
cache_as_ram for AMD and some intel
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/include')
-rw-r--r-- | src/arch/i386/include/arch/cpu.h | 2 | ||||
-rw-r--r-- | src/arch/i386/include/arch/hlt.h | 8 | ||||
-rw-r--r-- | src/arch/i386/include/arch/io.h | 6 | ||||
-rw-r--r-- | src/arch/i386/include/arch/romcc_io.h | 29 |
4 files changed, 32 insertions, 13 deletions
diff --git a/src/arch/i386/include/arch/cpu.h b/src/arch/i386/include/arch/cpu.h index 0c5b0604ad..4cdeded8bc 100644 --- a/src/arch/i386/include/arch/cpu.h +++ b/src/arch/i386/include/arch/cpu.h @@ -104,7 +104,7 @@ static inline unsigned int cpuid_edx(unsigned int op) #define X86_VENDOR_SIS 10 #define X86_VENDOR_UNKNOWN 0xff -#ifndef __ROMCC__ +#if !defined( __ROMCC__ ) && defined( __GNUC__) #include <device/device.h> diff --git a/src/arch/i386/include/arch/hlt.h b/src/arch/i386/include/arch/hlt.h index 7d3a563734..23ff1aa918 100644 --- a/src/arch/i386/include/arch/hlt.h +++ b/src/arch/i386/include/arch/hlt.h @@ -1,19 +1,15 @@ #ifndef ARCH_HLT_H #define ARCH_HLT_H -#ifdef __ROMCC__ +#if defined( __ROMCC__) && !defined(__GNUC__) static void hlt(void) { __builtin_hlt(); } - -#endif - -#if defined(__GNUC__) && !defined(__ROMCC__) +#else static inline void hlt(void) { asm("hlt"); - return; } #endif diff --git a/src/arch/i386/include/arch/io.h b/src/arch/i386/include/arch/io.h index 4bd2f4a4c3..07d091328a 100644 --- a/src/arch/i386/include/arch/io.h +++ b/src/arch/i386/include/arch/io.h @@ -9,8 +9,7 @@ * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" * versions of the single-IO instructions (inb_p/inw_p/..). */ - -#ifdef __ROMCC__ +#if defined( __ROMCC__ ) && !defined (__GNUC__) static inline void outb(uint8_t value, uint16_t port) { __builtin_outb(value, port); @@ -42,7 +41,6 @@ static inline uint32_t inl(uint16_t port) { return __builtin_inl(port); } - #else static inline void outb(uint8_t value, uint16_t port) @@ -81,7 +79,7 @@ static inline uint32_t inl(uint16_t port) return value; } -#endif /* __ROMCC__ */ +#endif /* __ROMCC__ && !__GNUC__*/ static inline void outsb(uint16_t port, const void *addr, unsigned long count) { diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h index 80037bd7ad..1d3e603ed0 100644 --- a/src/arch/i386/include/arch/romcc_io.h +++ b/src/arch/i386/include/arch/romcc_io.h @@ -33,8 +33,7 @@ static inline void write32(unsigned long addr, uint32_t value) { *((volatile uint32_t *)(addr)) = value; } - - +#if 0 typedef __builtin_div_t div_t; typedef __builtin_ldiv_t ldiv_t; typedef __builtin_udiv_t udiv_t; @@ -72,6 +71,32 @@ inline int log2(int value) */ return __builtin_bsr(value); } +#endif + +static inline int log2(int value) +{ + unsigned int r = 0; + __asm__ volatile ( + "bsrl %1, %0\n\t" + "jnz 1f\n\t" + "movl $-1, %0\n\t" + "1:\n\t" + : "=r" (r) : "r" (value)); + return r; + +} +static inline int log2f(int value) +{ + unsigned int r = 0; + __asm__ volatile ( + "bsfl %1, %0\n\t" + "jnz 1f\n\t" + "movl $-1, %0\n\t" + "1:\n\t" + : "=r" (r) : "r" (value)); + return r; + +} #define PCI_ADDR(BUS, DEV, FN, WHERE) ( \ (((BUS) & 0xFF) << 16) | \ |