summaryrefslogtreecommitdiff
path: root/src/arch/i386/include
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-01-16 17:53:38 +0000
committerStefan Reinauer <stepan@openbios.org>2010-01-16 17:53:38 +0000
commit9fe4d797a37671a65053add3f7cca27397db0b9b (patch)
tree5cabbdc8b6e7eb970891b55d1ea3727a4a71aca2 /src/arch/i386/include
parent984e0f3a0c3a82339ef8afcf7f315f377e0c81fc (diff)
downloadcoreboot-9fe4d797a37671a65053add3f7cca27397db0b9b.tar.xz
coreboot used to have two different "APIs" for memory accesses:
read32(unsigned long addr) vs readl(void *addr) and write32(unsigned long addr, uint32_t value) vs writel(uint32_t value, void *addr) read32 was only available in __PRE_RAM__ stage, while readl was used in stage2. Some unclean implementations then made readl available to __PRE_RAM__ too which results in really messy includes and code. This patch fixes all code to use the read32/write32 variant, so that we can remove readl/writel in another patch. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/include')
-rw-r--r--src/arch/i386/include/arch/io.h40
-rw-r--r--src/arch/i386/include/arch/romcc_io.h3
2 files changed, 42 insertions, 1 deletions
diff --git a/src/arch/i386/include/arch/io.h b/src/arch/i386/include/arch/io.h
index 59af68c203..e2e15ec762 100644
--- a/src/arch/i386/include/arch/io.h
+++ b/src/arch/i386/include/arch/io.h
@@ -136,6 +136,14 @@ static inline void insl(uint16_t port, void *addr, unsigned long count)
);
}
+/* XXX XXX XXX This is a story from the evil API from hell XXX XXX XXX
+ * We have different functions for memory access in pre-ram stage and ram
+ * stage. Those in pre-ram stage are called write32 and expect the address
+ * first and the address as a pointer type. Those in ram stage are called
+ * writel and expect the datum first and the address as an integer type.
+ * Until all code is checked and fixed, I'll add both versions here now.
+ */
+
static inline void writeb(uint8_t b, volatile void *addr)
{
*(volatile uint8_t *) addr = b;
@@ -166,5 +174,37 @@ static inline uint32_t readl(const volatile void *addr)
return *(volatile uint32_t *) addr;
}
+#if !defined(__PRE_RAM__)
+static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr)
+{
+ return *((volatile uint8_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint16_t read16(unsigned long addr)
+{
+ return *((volatile uint16_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint32_t read32(unsigned long addr)
+{
+ return *((volatile uint32_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) void write8(unsigned long addr, uint8_t value)
+{
+ *((volatile uint8_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write16(unsigned long addr, uint16_t value)
+{
+ *((volatile uint16_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write32(unsigned long addr, uint32_t value)
+{
+ *((volatile uint32_t *)(addr)) = value;
+}
+#endif
+
#endif
diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h
index fca27c4ec6..738af667eb 100644
--- a/src/arch/i386/include/arch/romcc_io.h
+++ b/src/arch/i386/include/arch/romcc_io.h
@@ -3,7 +3,7 @@
#include <stdint.h>
-
+#ifdef __PRE_RAM__
static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr)
{
return *((volatile uint8_t *)(addr));
@@ -33,6 +33,7 @@ static inline __attribute__((always_inline)) void write32(unsigned long addr, ui
{
*((volatile uint32_t *)(addr)) = value;
}
+#endif
#if CONFIG_MMCONF_SUPPORT