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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-02-19 19:59:03 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-02-19 19:59:03 +0000 |
| commit | 3c970eee2a0a388374e672d7fd80b12fe0382abc (patch) | |
| tree | d6254518c3fe921696b52b7c817e39dde9505349 /src/arch/i386/init/bootblock.c | |
| parent | 8e9234ffff5730df6a498fae6cfaf5c0ee101c5b (diff) | |
| download | coreboot-3c970eee2a0a388374e672d7fd80b12fe0382abc.tar.xz | |
Revert deletion of src/arch/i386/init.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/init/bootblock.c')
| -rw-r--r-- | src/arch/i386/init/bootblock.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/arch/i386/init/bootblock.c b/src/arch/i386/init/bootblock.c new file mode 100644 index 0000000000..86a5c5b136 --- /dev/null +++ b/src/arch/i386/init/bootblock.c @@ -0,0 +1,47 @@ +#define __PRE_RAM__ +#if CONFIG_LOGICAL_CPUS && \ + (defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT)) +#include <cpu/x86/lapic/boot_cpu.c> +#else +#define boot_cpu(x) 1 +#endif + +#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT +#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT +#else +static void bootblock_northbridge_init(void) { } +#endif +#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT +#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT +#else +static void bootblock_southbridge_init(void) { } +#endif + +static unsigned long findstage(char* target) +{ + unsigned long entry; + asm volatile ( + "mov $1f, %%esp\n\t" + "jmp walkcbfs\n\t" + "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp"); + return entry; +} + +static void call(unsigned long addr, unsigned long bist) +{ + asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist)); +} + +static void main(unsigned long bist) +{ + if (boot_cpu()) { + bootblock_northbridge_init(); + bootblock_southbridge_init(); + } + const char* target1 = "fallback/romstage"; + unsigned long entry; + entry = findstage(target1); + if (entry) call(entry, bist); + asm volatile ("1:\n\thlt\n\tjmp 1b\n\t"); +} + |