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authorStefan Reinauer <stepan@coresystems.de>2010-04-13 13:43:35 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-13 13:43:35 +0000
commit79253841a7b72351346755fea0c9d89b2426f81a (patch)
treefe01d88e27e1f7e61ad9c023853d41717200a393 /src/arch/i386/init
parentea7f5a253b5e7b954a207349d61ca24a145765a3 (diff)
downloadcoreboot-79253841a7b72351346755fea0c9d89b2426f81a.tar.xz
clean up LD scripts and add some comments and proper license headers
where applicable. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5419 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/init')
-rw-r--r--src/arch/i386/init/ldscript_apc.lb25
-rw-r--r--src/arch/i386/init/ldscript_failover.lb41
-rw-r--r--src/arch/i386/init/ldscript_fallback_cbfs.lb43
3 files changed, 53 insertions, 56 deletions
diff --git a/src/arch/i386/init/ldscript_apc.lb b/src/arch/i386/init/ldscript_apc.lb
index 1e79c0aa6f..789a168e0e 100644
--- a/src/arch/i386/init/ldscript_apc.lb
+++ b/src/arch/i386/init/ldscript_apc.lb
@@ -1,4 +1,23 @@
-/* INPUT(coreboot_ap.rom)*/
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
INCLUDE "ldoptions"
SECTIONS
{
@@ -9,8 +28,4 @@ SECTIONS
*(.rodata.*)
_eapcrom = .;
}
- _iseg_apc = CONFIG_DCACHE_RAM_BASE;
- _eiseg_apc = _iseg_apc + SIZEOF(.apcrom);
- _liseg_apc = _apcrom;
- _eliseg_apc = _eapcrom;
}
diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/i386/init/ldscript_failover.lb
index deec710209..7e48dc1a25 100644
--- a/src/arch/i386/init/ldscript_failover.lb
+++ b/src/arch/i386/init/ldscript_failover.lb
@@ -1,29 +1,24 @@
/*
- * Memory map:
+ * This file is part of the coreboot project.
*
- * CONFIG_RAMBASE
- * : data segment
- * : bss segment
- * : heap
- * : stack
- * CONFIG_ROMBASE
- * : coreboot text
- * : readonly text
- */
-/*
- * Bootstrap code for the STPC Consumer
- * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
*
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- * Rewritten by Eric Biederman
- */
-/*
- * We use ELF as output format. So that we can
- * debug the code in some form.
- */
+/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
@@ -34,8 +29,6 @@ MEMORY {
TARGET(binary)
SECTIONS
{
- . = 0;
-
/* This section might be better named .setup */
.rom ROMLOC : {
_rom = .;
@@ -44,7 +37,7 @@ SECTIONS
*(.rom.data.*);
*(.rodata.*);
_erom = .;
- } >rom =0xff
+ } >rom = 0xff
ROMLOC = 0xffffff00 - (_erom - _rom) + 1;
diff --git a/src/arch/i386/init/ldscript_fallback_cbfs.lb b/src/arch/i386/init/ldscript_fallback_cbfs.lb
index c77f9e8334..22e06d8941 100644
--- a/src/arch/i386/init/ldscript_fallback_cbfs.lb
+++ b/src/arch/i386/init/ldscript_fallback_cbfs.lb
@@ -1,36 +1,27 @@
/*
- * Memory map:
+ * This file is part of the coreboot project.
*
- * CONFIG_RAMBASE
- * : data segment
- * : bss segment
- * : heap
- * : stack
- * CONFIG_ROMBASE
- * : coreboot text
- * : readonly text
- */
-/*
- * Bootstrap code for the STPC Consumer
- * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
*
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- * Rewritten by Eric Biederman
- */
-/*
- * We use ELF as output format. So that we can
- * debug the code in some form.
- */
+/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
-/*
-ENTRY(_start)
-*/
-
TARGET(binary)
SECTIONS
{
@@ -45,8 +36,6 @@ SECTIONS
_rom = .;
*(.rom.text);
*(.rom.data);
- *(.init.rodata.*);
- *(.init.text);
*(.rodata);
*(.rodata.*);
*(.rom.data.*);