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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-04-08 21:04:45 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-04-08 21:04:45 +0000 |
| commit | e64b63750f029dac66902dee8cf6a7cf82ba44a3 (patch) | |
| tree | 6735ae2018eec030df0b88c2025d61da293dd4f2 /src/arch/i386/init | |
| parent | 362db613a0556a102e2812c1c00e3491eafdb66f (diff) | |
| download | coreboot-e64b63750f029dac66902dee8cf6a7cf82ba44a3.tar.xz | |
Split crt0.S.lb into prologue and epilogue
(the latter only for romcc), rename crt0_includes.h
to crt0.S, and compile that directly.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/init')
| -rw-r--r-- | src/arch/i386/init/crt0_prologue.inc | 28 | ||||
| -rw-r--r-- | src/arch/i386/init/crt0_romcc_epilogue.inc (renamed from src/arch/i386/init/crt0.S.lb) | 23 |
2 files changed, 28 insertions, 23 deletions
diff --git a/src/arch/i386/init/crt0_prologue.inc b/src/arch/i386/init/crt0_prologue.inc new file mode 100644 index 0000000000..b0ce2cf869 --- /dev/null +++ b/src/arch/i386/init/crt0_prologue.inc @@ -0,0 +1,28 @@ +/* + * Copyright 2002 Eric Biederman + * + * This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + + +#include <arch/asm.h> +#include <arch/intel.h> +#include <console/loglevel.h> + +#ifndef ASM_CONSOLE_LOGLEVEL +#define ASM_CONSOLE_LOGLEVEL CONFIG_MAXIMUM_CONSOLE_LOGLEVEL +#endif + +/* + * This is the entry code the code in .reset section + * jumps to this address. + * + */ +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits + + post_code(0x01) /* delay for chipsets */ + diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0_romcc_epilogue.inc index 5e7a5fa8c7..a8a6043830 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0_romcc_epilogue.inc @@ -21,27 +21,6 @@ */ -#include <arch/asm.h> -#include <arch/intel.h> -#include <console/loglevel.h> - -#ifndef ASM_CONSOLE_LOGLEVEL -#define ASM_CONSOLE_LOGLEVEL CONFIG_MAXIMUM_CONSOLE_LOGLEVEL -#endif - -/* - * This is the entry code the code in .reset section - * jumps to this address. - * - */ -.section ".rom.data", "a", @progbits -.section ".rom.text", "ax", @progbits - - post_code(0x01) /* delay for chipsets */ - -#include "crt0_includes.h" - -#if CONFIG_USE_DCACHE_RAM == 0 #ifndef CONSOLE_DEBUG_TX_STRING /* uses: esp, ebx, ax, dx */ # define __CRT_CONSOLE_TX_STRING(string) \ @@ -143,5 +122,3 @@ str_pre_main: .string "Jumping to coreboot.\r\n" str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX .string "/coreboot_ram" - -#endif /* CONFIG_USE_DCACHE_RAM */ |