diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-01 09:50:32 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-01 09:50:32 +0000 |
commit | 0c781b2694b2c137d9761704954ea38be5ba8a15 (patch) | |
tree | 55c8bb4ea9f5875da7e4f7ffa6b5e7d2aa87a4b8 /src/arch/i386/init | |
parent | 84b685af5f1e1cf49c2c2f22ae80a8a0df8472f8 (diff) | |
download | coreboot-0c781b2694b2c137d9761704954ea38be5ba8a15.tar.xz |
-Â get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files.
- start naming all versions of post code output "post_code()"
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/init')
-rw-r--r-- | src/arch/i386/init/bootblock_prologue.c | 2 | ||||
-rw-r--r-- | src/arch/i386/init/car.S | 2 | ||||
-rw-r--r-- | src/arch/i386/init/crt0.S.lb | 10 |
3 files changed, 9 insertions, 5 deletions
diff --git a/src/arch/i386/init/bootblock_prologue.c b/src/arch/i386/init/bootblock_prologue.c index f921c3f8d0..4baaa08a6e 100644 --- a/src/arch/i386/init/bootblock_prologue.c +++ b/src/arch/i386/init/bootblock_prologue.c @@ -33,5 +33,5 @@ .section ".rom.data", "a", @progbits .section ".rom.text", "ax", @progbits - intel_chip_post_macro(0x01) /* delay for chipsets */ + post_code(0x01) /* delay for chipsets */ diff --git a/src/arch/i386/init/car.S b/src/arch/i386/init/car.S index 107da7b222..64743ef8fc 100644 --- a/src/arch/i386/init/car.S +++ b/src/arch/i386/init/car.S @@ -54,7 +54,7 @@ __protected_stage0: /* Save the BIST result. */ movl %eax, %ebp - intel_chip_post_macro(0x01) + post_code(0x01) movw $ROM_DATA_SEG, %ax movw %ax, %ds diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index c4206bf007..5e7a5fa8c7 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -25,6 +25,10 @@ #include <arch/intel.h> #include <console/loglevel.h> +#ifndef ASM_CONSOLE_LOGLEVEL +#define ASM_CONSOLE_LOGLEVEL CONFIG_MAXIMUM_CONSOLE_LOGLEVEL +#endif + /* * This is the entry code the code in .reset section * jumps to this address. @@ -33,7 +37,7 @@ .section ".rom.data", "a", @progbits .section ".rom.text", "ax", @progbits - intel_chip_post_macro(0x01) /* delay for chipsets */ + post_code(0x01) /* delay for chipsets */ #include "crt0_includes.h" @@ -61,7 +65,7 @@ __main: * isn\'t really that big we just copy/clear using bytes, not * double words. */ - intel_chip_post_macro(0x11) /* post 11 */ + post_code(0x11) /* post 11 */ cld /* clear direction flag */ @@ -78,7 +82,7 @@ __main: call cbfs_and_run_core .Lhlt: - intel_chip_post_macro(0xee) /* post fe */ + post_code(0xee) /* post fe */ hlt jmp .Lhlt |