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| author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:17:25 +0000 |
|---|---|---|
| committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:17:25 +0000 |
| commit | 6ca7636c8f52560e732cdd5b1c7829cda5aa2bde (patch) | |
| tree | cc45ae7c4dea6e2c5338f52b4314106bf07023be /src/arch/i386/init | |
| parent | b2ed53dd5669c2c3839633bd2b3b4af709a5b149 (diff) | |
| download | coreboot-6ca7636c8f52560e732cdd5b1c7829cda5aa2bde.tar.xz | |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator: Yinghai Lu <yhlu@tyan.com>
cache_as_ram for AMD and some intel
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/init')
| -rw-r--r-- | src/arch/i386/init/crt0.S.lb | 3 | ||||
| -rw-r--r-- | src/arch/i386/init/ldscript.lb | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index f0326fa8f8..67ef91059b 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -37,6 +37,7 @@ #include "crt0_includes.h" +#if USE_DCACHE_RAM == 0 #ifndef CONSOLE_DEBUG_TX_STRING /* uses: esp, ebx, ax, dx */ # define __CRT_CONSOLE_TX_STRING(string) \ @@ -219,3 +220,5 @@ str_pre_main: .string "Jumping to LinuxBIOS.\r\n" .previous #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ + +#endif /* USE_DCACHE_RAM */ diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb index ba8078b005..7a169e1a51 100644 --- a/src/arch/i386/init/ldscript.lb +++ b/src/arch/i386/init/ldscript.lb @@ -46,6 +46,7 @@ SECTIONS _rom = .; *(.rom.text); *(.rom.data); + *(.rom.data.*); . = ALIGN(16); _erom = .; } |