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authorArne Georg Gleditsch <arne.gleditsch@numascale.com>2010-09-09 14:54:07 +0000
committerMyles Watson <mylesgw@gmail.com>2010-09-09 14:54:07 +0000
commitd6689ed7813b37c92bbe6058155d67c4757fef26 (patch)
tree2067aa432c89740cb808662de827a6d32970d1c3 /src/arch/i386/lib
parente0a000cc12984700c87fea6b153fa4221a125e19 (diff)
downloadcoreboot-d6689ed7813b37c92bbe6058155d67c4757fef26.tar.xz
Please find appended. This patch gets rid of the %gs magic altogether,
fixes a few alignment wrinkles and sets up and registers the MMCONF area for AMD Fam10h CPUs (where selected by mainboard configuration). It removes a bit of code that proved troublesome in MMCONF setups from mcp55_early_setup_car.c, as per earlier discussion. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386/lib')
-rw-r--r--src/arch/i386/lib/pci_ops_mmconf.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/i386/lib/pci_ops_mmconf.c b/src/arch/i386/lib/pci_ops_mmconf.c
index a6057084f0..7d8fb329d0 100644
--- a/src/arch/i386/lib/pci_ops_mmconf.c
+++ b/src/arch/i386/lib/pci_ops_mmconf.c
@@ -27,12 +27,12 @@ static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn, int
static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn, int where)
{
- return (read16x(PCI_MMIO_ADDR(bus, devfn, where)));
+ return (read16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1));
}
static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn, int where)
{
- return (read32x(PCI_MMIO_ADDR(bus, devfn, where)));
+ return (read32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3));
}
static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn, int where, uint8_t value)
@@ -42,12 +42,12 @@ static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn, int
static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn, int where, uint16_t value)
{
- write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
+ write16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1, value);
}
static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn, int where, uint32_t value)
{
- write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
+ write32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3, value);
}