Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

8 files changed, 35 insertions, 35 deletions

diff --git a/src/arch/i386/lib/cbfs_and_run.c b/src/arch/i386/lib/cbfs_and_run.c
index a6f19e50ee..1b86f56371 100644
--- a/src/arch/i386/lib/cbfs_and_run.c
+++ b/src/arch/i386/lib/cbfs_and_run.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2008-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
diff --git a/src/arch/i386/lib/cpu.c b/src/arch/i386/lib/cpu.c
index 0e54b9a87d..3732ae296e 100644
--- a/src/arch/i386/lib/cpu.c
+++ b/src/arch/i386/lib/cpu.c
@@ -43,7 +43,7 @@ static int have_cpuid_p(void)
  * by the fact that they preserve the flags across the division of 5/2.
  * PII and PPro exhibit this behavior too, but they have cpuid available.
  */
- 
+
 /*
  * Perform the Cyrix 5/2 test. A Cyrix won't change
  * the flags, while other 486 chips will.
@@ -68,11 +68,11 @@ static inline int test_cyrix_52div(void)
  *	Detect a NexGen CPU running without BIOS hypercode new enough
  *	to have CPUID. (Thanks to Herbert Oppmann)
  */
- 
+
 static int deep_magic_nexgen_probe(void)
 {
 	int ret;
-	
+
 	__asm__ __volatile__ (
 		"	movw	$0x5555, %%ax\n"
 		"	xorw	%%dx,%%dx\n"
@@ -81,7 +81,7 @@ static int deep_magic_nexgen_probe(void)
 		"	movl	$0, %%eax\n"
 		"	jnz	1f\n"
 		"	movl	$1, %%eax\n"
-		"1:\n" 
+		"1:\n"
 		: "=a" (ret) : : "cx", "dx" );
 	return  ret;
 }
@@ -95,7 +95,7 @@ static struct {
 } x86_vendors[] = {
 	{ X86_VENDOR_INTEL,     "GenuineIntel", },
 	{ X86_VENDOR_CYRIX,     "CyrixInstead", },
-	{ X86_VENDOR_AMD,       "AuthenticAMD", },       
+	{ X86_VENDOR_AMD,       "AuthenticAMD", },
 	{ X86_VENDOR_UMC,       "UMC UMC UMC ", },
 	{ X86_VENDOR_NEXGEN,    "NexGenDriven", },
 	{ X86_VENDOR_CENTAUR,   "CentaurHauls", },
@@ -124,7 +124,7 @@ static const char *cpu_vendor_name(int vendor)
 	const char *name;
 	name = "<invalid cpu vendor>";
 	if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
-		(x86_vendor_name[vendor] != 0)) 
+		(x86_vendor_name[vendor] != 0))
 	{
 		name = x86_vendor_name[vendor];
 	}
@@ -173,7 +173,7 @@ static void identify_cpu(struct device *cpu)
 		vendor_name[10] = (result.ecx >> 16) & 0xff;
 		vendor_name[11] = (result.ecx >> 24) & 0xff;
 		vendor_name[12] = '\0';
-		
+
 		/* Intel-defined flags: level 0x00000001 */
 		if (cpuid_level >= 0x00000001) {
 			cpu->device = cpuid_eax(0x00000001);
@@ -200,7 +200,7 @@ static void set_cpu_ops(struct device *cpu)
 		struct cpu_device_id *id;
 		for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
 			if ((cpu->vendor == id->vendor) &&
-				(cpu->device == id->device)) 
+				(cpu->device == id->device))
 			{
 				goto found;
 			}
@@ -221,7 +221,7 @@ void cpu_initialize(void)
 	struct device *cpu;
 	struct cpu_info *info;
 	struct cpuinfo_x86 c;
-	
+
 	info = cpu_info();
 
 	printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
@@ -240,11 +240,11 @@ void cpu_initialize(void)
 
 	printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
 		c.x86, c.x86_model, c.x86_mask);
-	
+
 	/* Lookup the cpu's operations */
 	set_cpu_ops(cpu);
 
-	if(!cpu->ops) { 
+	if(!cpu->ops) {
 		/* mask out the stepping and try again */
 		cpu->device -= c.x86_mask;
 		set_cpu_ops(cpu);
@@ -252,7 +252,7 @@ void cpu_initialize(void)
 		if(!cpu->ops) die("Unknown cpu");
 		printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
 	}
-	
+
 
 	/* Initialize the cpu */
 	if (cpu->ops && cpu->ops->init) {
diff --git a/src/arch/i386/lib/exception.c b/src/arch/i386/lib/exception.c
index eb1df20e26..20917b6f40 100644
--- a/src/arch/i386/lib/exception.c
+++ b/src/arch/i386/lib/exception.c
@@ -4,7 +4,7 @@
 #if defined(CONFIG_GDB_STUB) && CONFIG_GDB_STUB == 1
 
 /* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
- * At least NUM_REGBYTES*2 are needed for register packets 
+ * At least NUM_REGBYTES*2 are needed for register packets
  */
 #define BUFMAX 400
 enum regnames {
@@ -62,7 +62,7 @@ static uint32_t gdb_stub_registers[NUM_REGS];
 #define GDB_SIGSOUND     42    /* Sound completed */
 #define GDB_SIGSAK       43    /* Secure attention */
 #define GDB_SIGPRIO      44    /* SIGPRIO */
-		        
+
 #define GDB_SIG33        45    /* Real-time event 33 */
 #define GDB_SIG34        46    /* Real-time event 34 */
 #define GDB_SIG35        47    /* Real-time event 35 */
@@ -375,7 +375,7 @@ void x86_exception(struct eregs *info)
 	if (info->vector < ARRAY_SIZE(exception_to_signal)) {
 		signo = exception_to_signal[info->vector];
 	}
-	
+
 	/* reply to the host that an exception has occured */
 	out_buffer[0] = 'S';
 	out_buffer[1] = hexchars[(signo>>4) & 0xf];
@@ -412,7 +412,7 @@ void x86_exception(struct eregs *info)
 		case 'm':
 			/* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
 			ptr = &in_buffer[1];
-			if (	parse_ulong(&ptr, &addr) && 
+			if (	parse_ulong(&ptr, &addr) &&
 				(*ptr++ == ',') &&
 				parse_ulong(&ptr, &length)) {
 				copy_to_hex(out_buffer, (void *)addr, length);
@@ -423,7 +423,7 @@ void x86_exception(struct eregs *info)
 		case 'M':
 			/* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
 			ptr = &in_buffer[1];
-			if (	parse_ulong(&ptr, &addr) && 
+			if (	parse_ulong(&ptr, &addr) &&
 				(*(ptr++) == ',') &&
 				parse_ulong(&ptr, &length) &&
 				(*(ptr++) == ':')) {
@@ -475,7 +475,7 @@ void x86_exception(struct eregs *info)
 		put_packet(out_buffer);
 	}
 #else /* !CONFIG_GDB_STUB */
-	printk(BIOS_EMERG, 
+	printk(BIOS_EMERG,
 		"Unexpected Exception: %d @ %02x:%08x - Halting\n"
 		"Code: %d eflags: %08x\n"
 		"eax: %08x ebx: %08x ecx: %08x edx: %08x\n"
diff --git a/src/arch/i386/lib/id.inc b/src/arch/i386/lib/id.inc
index 9f402f85b0..443dbad38a 100644
--- a/src/arch/i386/lib/id.inc
+++ b/src/arch/i386/lib/id.inc
@@ -2,9 +2,9 @@
 
 	.globl __id_start
 __id_start:
-vendor:	
+vendor:
 	.asciz CONFIG_MAINBOARD_VENDOR
-part:		
+part:
 	.asciz CONFIG_MAINBOARD_PART_NUMBER
 .long __id_end + CONFIG_ID_SECTION_OFFSET - vendor  /* Reverse offset to the vendor id */
 .long __id_end + CONFIG_ID_SECTION_OFFSET - part    /* Reverse offset to the part number */
diff --git a/src/arch/i386/lib/ioapic.c b/src/arch/i386/lib/ioapic.c
index efc2ac52fc..d6616f5529 100644
--- a/src/arch/i386/lib/ioapic.c
+++ b/src/arch/i386/lib/ioapic.c
@@ -40,13 +40,13 @@ void clear_ioapic(u32 ioapic_base)
 	u32 low, high;
 	u32 i, ioapic_interrupts;
 
-	printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base); 
+	printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
 
 	/* Read the available number of interrupts */
 	ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
 	if (!ioapic_interrupts || ioapic_interrupts == 0xff)
 		ioapic_interrupts = 24;
-	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); 
+	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
 
 	low = DISABLED;
 	high = NONE;
@@ -70,15 +70,15 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
 	u32 low, high;
 	u32 i, ioapic_interrupts;
 
-	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base); 
+	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);
 	printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = %02x\n",
 			bsp_lapicid);
 
 	if (ioapic_id) {
-		printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id); 
+		printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
 		/* Set IOAPIC ID if it has been specified */
-		io_apic_write(ioapic_base, 0x00, 
-			(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) | 
+		io_apic_write(ioapic_base, 0x00,
+			(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) |
 				(ioapic_id << 24));
 	}
 
@@ -86,7 +86,7 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
 	ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
 	if (!ioapic_interrupts || ioapic_interrupts == 0xff)
 		ioapic_interrupts = 24;
-	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); 
+	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
 
 
 // XXX this decision should probably be made elsewhere, and
@@ -101,11 +101,11 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
 	/* For the Pentium 4 and above APICs deliver their interrupts
 	 * on the front side bus, enable that.
 	 */
-	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); 
+	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
 	io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0));
 #endif
 #ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
-	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n"); 
+	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
 	io_apic_write(ioapic_base, 0x03, 0);
 #endif
 
diff --git a/src/arch/i386/lib/pci_ops_auto.c b/src/arch/i386/lib/pci_ops_auto.c
index 1f144381ee..92eedd30fb 100644
--- a/src/arch/i386/lib/pci_ops_auto.c
+++ b/src/arch/i386/lib/pci_ops_auto.c
@@ -33,7 +33,7 @@ static int pci_sanity_check(const struct pci_bus_operations *o)
 		vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
 		if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
 			((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||
-				(vendor == PCI_VENDOR_ID_MOTOROLA))) { 
+				(vendor == PCI_VENDOR_ID_MOTOROLA))) {
 			return 1;
 		}
 	}
@@ -54,8 +54,8 @@ static const struct pci_bus_operations *pci_check_direct(void)
 		outb(0x01, 0xCFB);
 		tmp = inl(0xCF8);
 		outl(0x80000000, 0xCF8);
-		if ((inl(0xCF8) == 0x80000000) && 
-			pci_sanity_check(&pci_cf8_conf1)) 
+		if ((inl(0xCF8) == 0x80000000) &&
+			pci_sanity_check(&pci_cf8_conf1))
 		{
 			outl(tmp, 0xCF8);
 			printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");
diff --git a/src/arch/i386/lib/printk_init.c b/src/arch/i386/lib/printk_init.c
index d3064046f7..f29ba667f1 100644
--- a/src/arch/i386/lib/printk_init.c
+++ b/src/arch/i386/lib/printk_init.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; version 2 of
diff --git a/src/arch/i386/lib/stages.c b/src/arch/i386/lib/stages.c
index 0605abf49b..a6a232a04a 100644
--- a/src/arch/i386/lib/stages.c
+++ b/src/arch/i386/lib/stages.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or