Please find appended. This patch gets rid of the %gs magic altogether,

fixes a few alignment wrinkles and sets up and registers the MMCONF area
for AMD Fam10h CPUs (where selected by mainboard configuration).  It
removes a bit of code that proved troublesome in MMCONF setups from
mcp55_early_setup_car.c, as per earlier discussion.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 15 insertions, 15 deletions

diff --git a/src/arch/i386/include/arch/mmio_conf.h b/src/arch/i386/include/arch/mmio_conf.h
index df91cb561d..08962f02fa 100644
--- a/src/arch/i386/include/arch/mmio_conf.h
+++ b/src/arch/i386/include/arch/mmio_conf.h
@@ -2,13 +2,13 @@
 #define ARCH_MMIO_H 1
 
 
-//extended read, GS is already set
+// Extended read, constrain to use registers as mandated by AMD MMCONFIG mechanism.
 
 static inline __attribute__((always_inline)) uint8_t read8x(uint32_t addr)
 {
 	uint8_t value;
         __asm__ volatile (
-                "movb %%gs:(%1), %0\n\t"
+                "movb (%1), %%al\n\t"
                 :"=a"(value): "b" (addr)
         );
         return value;
@@ -18,7 +18,7 @@ static inline __attribute__((always_inline)) uint16_t read16x(uint32_t addr)
 {
         uint16_t value;
         __asm__ volatile (
-                "movw %%gs:(%1), %0\n\t"
+                "movw (%1), %%ax\n\t"
                 :"=a"(value): "b" (addr)
         );
 
@@ -30,7 +30,7 @@ static inline __attribute__((always_inline)) uint32_t read32x(uint32_t addr)
 {
         uint32_t value;
         __asm__ volatile (
-                "movl %%gs:(%1), %0\n\t"
+                "movl (%1), %%eax\n\t"
                 :"=a"(value): "b" (addr)
         );
 
@@ -41,7 +41,7 @@ static inline __attribute__((always_inline)) uint32_t read32x(uint32_t addr)
 static inline __attribute__((always_inline)) void write8x(uint32_t addr, uint8_t value)
 {
         __asm__ volatile (
-                "movb %1, %%gs:(%0)\n\t"
+                "movb %%al, (%0)\n\t"
                 :: "b" (addr), "a" (value)
         );
 
@@ -50,7 +50,7 @@ static inline __attribute__((always_inline)) void write8x(uint32_t addr, uint8_t
 static inline __attribute__((always_inline)) void write16x(uint32_t addr, uint16_t value)
 {
         __asm__ volatile (
-                "movw %1, %%gs:(%0)\n\t"
+                "movw %%ax, (%0)\n\t"
                 :: "b" (addr), "a" (value)
         );
 
@@ -59,7 +59,7 @@ static inline __attribute__((always_inline)) void write16x(uint32_t addr, uint16
 static inline __attribute__((always_inline)) void write32x(uint32_t addr, uint32_t value)
 {
         __asm__ volatile (
-                "movl %1, %%gs:(%0)\n\t"
+                "movl %%eax, (%0)\n\t"
                 :: "b" (addr), "a" (value)
         );
 }
diff --git a/src/arch/i386/include/arch/romcc_io.h b/src/arch/i386/include/arch/romcc_io.h
index 6bc7dfc179..79ea26550e 100644
--- a/src/arch/i386/include/arch/romcc_io.h
+++ b/src/arch/i386/include/arch/romcc_io.h
@@ -107,7 +107,7 @@ static inline __attribute__((always_inline)) uint16_t pci_io_read_config16(devic
 static inline __attribute__((always_inline)) uint16_t pci_mmio_read_config16(device_t dev, unsigned where)
 {
         unsigned addr;
-        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
+        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
         return read16x(addr);
 }
 #endif
@@ -138,7 +138,7 @@ static inline __attribute__((always_inline)) uint32_t pci_io_read_config32(devic
 static inline __attribute__((always_inline)) uint32_t pci_mmio_read_config32(device_t dev, unsigned where)
 {
         unsigned addr;
-        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
+        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
         return read32x(addr);
 }
 #endif
@@ -199,7 +199,7 @@ static inline __attribute__((always_inline)) void pci_io_write_config16(device_t
 static inline __attribute__((always_inline)) void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t value)
 {
         unsigned addr;
-        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
+        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
         write16x(addr, value);
 }
 #endif
@@ -230,7 +230,7 @@ static inline __attribute__((always_inline)) void pci_io_write_config32(device_t
 static inline __attribute__((always_inline)) void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t value)
 {
         unsigned addr;
-        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
+        addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
         write32x(addr, value);
 }
 #endif
diff --git a/src/arch/i386/lib/pci_ops_mmconf.c b/src/arch/i386/lib/pci_ops_mmconf.c
index a6057084f0..7d8fb329d0 100644
--- a/src/arch/i386/lib/pci_ops_mmconf.c
+++ b/src/arch/i386/lib/pci_ops_mmconf.c
@@ -27,12 +27,12 @@ static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn, int
 
 static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn, int where)
 {
-                return (read16x(PCI_MMIO_ADDR(bus, devfn, where)));
+                return (read16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1));
 }
 
 static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn, int where)
 {
-                return (read32x(PCI_MMIO_ADDR(bus, devfn, where)));
+                return (read32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3));
 }
 
 static void  pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn, int where, uint8_t value)
@@ -42,12 +42,12 @@ static void  pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn, int
 
 static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn, int where, uint16_t value)
 {
-                write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
+                write16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1, value);
 }
 
 static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn, int where, uint32_t value)
 {
-                write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
+                write32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3, value);
 }