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authorUwe Hermann <uwe@hermann-uwe.de>2009-08-25 15:03:20 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-08-25 15:03:20 +0000
commitfe2664a5f244f27fd37b39135b5af734235c0c95 (patch)
tree6b09e5fd3de00cee95770418fcbe5b98e002566f /src/arch/i386
parent20a1ae88404c6ca0e97191516ae9cda440568df5 (diff)
downloadcoreboot-fe2664a5f244f27fd37b39135b5af734235c0c95.tar.xz
Improve build output.
The Makefile prints need to be @printf -- not $(Q)printf -- as they should (1) be printed always (with 'make' _and_ with 'make V=1'), (2) but the printf command itself should not be printed, hence the '@'. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/i386')
-rw-r--r--src/arch/i386/Makefile.inc33
1 files changed, 16 insertions, 17 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc
index 541c5bb97d..4fb4ee5e21 100644
--- a/src/arch/i386/Makefile.inc
+++ b/src/arch/i386/Makefile.inc
@@ -18,20 +18,20 @@ $(obj)/coreboot.rom: $(obj)/coreboot.bootblock $(obj)/coreboot_ram $(CBFSTOOL)
$(Q)$(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock
$(Q)if [ -f fallback/coreboot_apc ]; \
then \
- $(Q) $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
+ $(Q)$(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
fi
$(Q)$(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
ifeq ($(CONFIG_PAYLOAD_NONE),y)
- $(Q)printf " PAYLOAD none (as specified by user)\n"
+ @printf " PAYLOAD none (as specified by user)\n"
else
- $(Q) printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n"
+ @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n"
$(Q)$(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG)
ifeq ($(CONFIG_VGA_BIOS),y)
- $(Q) printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
- $(Q) $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
+ @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
+ $(Q)$(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
endif
- $(Q) printf " CBFSPRINT ./build/coreboot.rom\n\n"
- $(CBFSTOOL) build/coreboot.rom print
+ @printf " CBFSPRINT ./build/coreboot.rom\n\n"
+ $(Q)$(CBFSTOOL) build/coreboot.rom print
endif
@@ -39,7 +39,7 @@ endif
# Build the bootblock
$(obj)/coreboot.bootblock: $(obj)/coreboot
- $(Q)printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
+ @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
$(Q)$(OBJCOPY) -O binary $< $@
$(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions
@@ -50,13 +50,13 @@ $(obj)/crt0_includes.h: $(crt0s)
$(Q)printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include "$(crt0)"\n)' > $@
$(obj)/mainboard/$(MAINBOARDDIR)/crt0.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
- $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm
+ $(Q)$(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm
$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/crt0_includes.h
- $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
+ $(Q)$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
$(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld
- $(Q)printf " LINK $(subst $(obj)/,,$(@))\n"
+ @printf " LINK $(subst $(obj)/,,$(@))\n"
$(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs)
$(Q)$(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map
@@ -64,31 +64,30 @@ $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld
# i386 specific tools
$(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
- $(Q)printf " OPTION $(subst $(obj)/,,$(@))\n"
+ @printf " OPTION $(subst $(obj)/,,$(@))\n"
$(Q)$(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
$(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
- $(Q)printf " HOSTCC $(subst $(obj)/,,$(@))\n"
+ @printf " HOSTCC $(subst $(obj)/,,$(@))\n"
$(Q)$(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
#######################################################################
# Build the coreboot_ram (stage 2)
$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/config/coreboot_ram.ld #ldoptions
- $(Q)printf " CC $(subst $(obj)/,,$(@))\n"
+ @printf " CC $(subst $(obj)/,,$(@))\n"
$(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o
$(Q)$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
- $(Q)printf " CC $(subst $(obj)/,,$(@))\n"
+ @printf " CC $(subst $(obj)/,,$(@))\n"
$(Q)$(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
$(obj)/coreboot.a: $(objs)
- $(Q)printf " AR $(subst $(obj)/,,$(@))\n"
+ @printf " AR $(subst $(obj)/,,$(@))\n"
$(Q)rm -f $(obj)/coreboot.a
$(Q)$(AR) cr $(obj)/coreboot.a $(objs)
-
#######################################################################
# done