summaryrefslogtreecommitdiff
path: root/src/arch/mips
diff options
context:
space:
mode:
authorJulius Werner <jwerner@chromium.org>2015-02-23 14:31:09 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-21 08:23:25 +0200
commit9ff8f6f818d4e5a8aa0fe21cbfaba9ccd865bc7b (patch)
treebc668e3ddf5f0abf9fc5c5f7911e29895bee46a6 /src/arch/mips
parent941847652406982f3c9944fdd98cce4029b533fb (diff)
downloadcoreboot-9ff8f6f818d4e5a8aa0fe21cbfaba9ccd865bc7b.tar.xz
Unify byte order macros and clrsetbits
This patch removes quite a bit of code duplication between cpu_to_le32() and clrsetbits_le32() style macros on the different architectures. This also syncs those macros back up to the new write32(a, v) style IO accessor macros that are now used on ARM and ARM64. CQ-DEPEND=CL:254862 BRANCH=none BUG=chromium:444723 TEST=Compiled Cosmos, Daisy, Blaze, Falco, Pinky, Pit, Rambi, Ryu, Storm and Urara. Booted on Jerry. Tried to compare binary images... unfortunately something about the new macro notation makes the compiler evaluate it more efficiently (not recalculating the address between the read and the write), so this was of limited value. Change-Id: If8ab62912c952d68a67a0f71e82b038732cd1317 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fd43bf446581bfb84bec4f2ebb56b5de95971c3b Original-Change-Id: I7d301b5bb5ac0db7f5ff39e3adc2b28a1f402a72 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/254866 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9838 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/include/arch/byteorder.h21
-rw-r--r--src/arch/mips/include/arch/io.h57
2 files changed, 2 insertions, 76 deletions
diff --git a/src/arch/mips/include/arch/byteorder.h b/src/arch/mips/include/arch/byteorder.h
index 90c375e691..a70ce82bac 100644
--- a/src/arch/mips/include/arch/byteorder.h
+++ b/src/arch/mips/include/arch/byteorder.h
@@ -20,29 +20,10 @@
#ifndef __MIPS_ARCH_BYTEORDER_H
#define __MIPS_ARCH_BYTEORDER_H
-#include <stdint.h>
-#include <swab.h>
-
#ifndef __ORDER_LITTLE_ENDIAN__
#errror "What endian are you!?"
#endif
-#define cpu_to_le64(x) ((uint64_t)(x))
-#define le64_to_cpu(x) ((uint64_t)(x))
-#define cpu_to_le32(x) ((uint32_t)(x))
-#define le32_to_cpu(x) ((uint32_t)(x))
-#define cpu_to_le16(x) ((uint16_t)(x))
-#define le16_to_cpu(x) ((uint16_t)(x))
-#define cpu_to_be64(x) swab64(x)
-#define be64_to_cpu(x) swab64(x)
-#define cpu_to_be32(x) swab32((x))
-#define be32_to_cpu(x) swab32((x))
-#define cpu_to_be16(x) swab16((x))
-#define be16_to_cpu(x) swab16((x))
-
-#define ntohll(x) be64_to_cpu(x)
-#define htonll(x) cpu_to_be64(x)
-#define ntohl(x) be32_to_cpu(x)
-#define htonl(x) cpu_to_be32(x)
+#define __LITTLE_ENDIAN 1234
#endif /* __MIPS_ARCH_BYTEORDER_H */
diff --git a/src/arch/mips/include/arch/io.h b/src/arch/mips/include/arch/io.h
index d034b09dc5..1d3d6c4504 100644
--- a/src/arch/mips/include/arch/io.h
+++ b/src/arch/mips/include/arch/io.h
@@ -26,7 +26,7 @@
#include <types.h>
#include <arch/cache.h>
-#include <arch/byteorder.h>
+#include <endian.h>
static inline uint8_t read8(unsigned long addr)
{
@@ -67,59 +67,4 @@ static inline void write32(unsigned long addr, uint32_t val)
asm("sync");
}
-/*
- * Clear and set bits in one shot. These macros can be used to clear and
- * set multiple bits in a register using a single call. These macros can
- * also be used to set a multiple-bit bit pattern using a mask, by
- * specifying the mask in the 'clear' parameter and the new bit pattern
- * in the 'set' parameter.
- */
-
-#define out_arch(type, endian, a, v) write##type(cpu_to_##endian(v), a)
-#define in_arch(type, endian, a) endian##_to_cpu(read##type(a))
-
-#define out_le32(a, v) out_arch(l, le32, a, v)
-#define out_le16(a, v) out_arch(w, le16, a, v)
-
-#define in_le32(a) in_arch(l, le32, a)
-#define in_le16(a) in_arch(w, le16, a)
-
-#define out_be32(a, v) out_arch(l, be32, a, v)
-#define out_be16(a, v) out_arch(w, be16, a, v)
-
-#define in_be32(a) in_arch(l, be32, a)
-#define in_be16(a) in_arch(w, be16, a)
-
-#define out_8(a, v) writeb(v, a)
-#define in_8(a) readb(a)
-
-#define clrbits(type, addr, clear) \
- out_##type((addr), in_##type(addr) & ~(clear))
-
-#define setbits(type, addr, set) \
- out_##type((addr), in_##type(addr) | (set))
-
-#define clrsetbits(type, addr, clear, set) \
- out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
-
-#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
-#define setbits_be32(addr, set) setbits(be32, addr, set)
-#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
-
-#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
-#define setbits_le32(addr, set) setbits(le32, addr, set)
-#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
-
-#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
-#define setbits_be16(addr, set) setbits(be16, addr, set)
-#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
-
-#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
-#define setbits_le16(addr, set) setbits(le16, addr, set)
-#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
-
-#define clrbits_8(addr, clear) clrbits(8, addr, clear)
-#define setbits_8(addr, set) setbits(8, addr, set)
-#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
-
#endif /* __MIPS_ARCH_IO_H */