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authorJulius Werner <jwerner@chromium.org>2014-12-19 16:11:14 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-07-29 20:25:59 +0200
commit8d8799a33aac86c2acdf94e0f0af3ef291748536 (patch)
treeb0d8db5b4c54b4d3a3a94925d42b915efbfda633 /src/arch/mips
parentb759ede57940aef94f648def5ada163ec6fa166d (diff)
downloadcoreboot-8d8799a33aac86c2acdf94e0f0af3ef291748536.tar.xz
arm, arm64, mips: Add rough static stack size checks with -Wstack-usage
We've seen an increasing need to reduce stack sizes more and more for space reasons, and it's always guesswork because no one has a good idea how little is too litte. We now have boards with 3K and 2K stacks, and old pieces of common code often allocate large temporary buffers that would lead to very dangerous and hard to detect bugs when someone eventually tries to use them on one of those. This patch tries improve this situation at least a bit by declaring 2K as the minimum stack size all of coreboot code should work with. It checks all function frames with -Wstack-usage=1536 to make sure we don't allocate more than 1.5K in a single buffer. This is of course not a perfect test, but it should catch the most common situation of declaring a single, large buffer in some close-to-leaf function (with the assumption that 0.5K is hopefully enough for all the "normal" functions above that). Change one example where we were a bit overzealous and put a 1K buffer into BSS back to stack allocation, since it actually conforms to this new assumption and frees up another kilobyte of that highly sought-after verstage space. Not touching x86 with any of this since it's lack of __PRE_RAM__ BSS often requires it to allocate way more on the stack than would usually be considered sane. BRANCH=veyron BUG=None TEST=Compiled Cosmos, Daisy, Falco, Blaze, Pit, Storm, Urara and Pinky, made sure they still build as well as before and don't show any stack usage warnings. Change-Id: Idc53d33bd8487bbef49d3ecd751914b0308006ec Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 8e5931066575e256dfc2295c3dab7f0e1b65417f Original-Change-Id: I30bd9c2c77e0e0623df89b9e5bb43ed29506be98 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/236978 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9729 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/include/arch/memlayout.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/mips/include/arch/memlayout.h b/src/arch/mips/include/arch/memlayout.h
index 949317308d..946fcf3a56 100644
--- a/src/arch/mips/include/arch/memlayout.h
+++ b/src/arch/mips/include/arch/memlayout.h
@@ -24,7 +24,9 @@
/* MIPS stacks need 8-byte alignment and stay in one place through ramstage. */
/* TODO: Double-check that that's the correct alignment for our ABI. */
-#define STACK(addr, size) REGION(stack, addr, size, 8)
+#define STACK(addr, size) \
+ REGION(stack, addr, size, 8) \
+ _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
#define DMA_COHERENT(addr, size) REGION(dma_coherent, addr, size, 4K)