summaryrefslogtreecommitdiff
path: root/src/arch/ppc
diff options
context:
space:
mode:
authorEric Biederman <ebiederm@xmission.com>2004-11-04 11:04:33 +0000
committerEric Biederman <ebiederm@xmission.com>2004-11-04 11:04:33 +0000
commit018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch)
tree528de120d262a9df05ce8b6119f593c85fa6b809 /src/arch/ppc
parent4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff)
downloadcoreboot-018d8dd60f2cc0c82faac0ee2657daa163dd43e7.tar.xz
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/ppc')
-rw-r--r--src/arch/ppc/include/arch/pci_ops.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/ppc/include/arch/pci_ops.h b/src/arch/ppc/include/arch/pci_ops.h
new file mode 100644
index 0000000000..6f9c3af3af
--- /dev/null
+++ b/src/arch/ppc/include/arch/pci_ops.h
@@ -0,0 +1,6 @@
+#ifndef ARCH_I386_PCI_OPS_H
+#define ARCH_I386_PCI_OPS_H
+
+void pci_set_method(void);
+
+#endif /* ARCH_I386_PCI_OPS_H */