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author | Subrata Banik <subrata.banik@intel.com> | 2015-08-05 17:01:55 +0530 |
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committer | Martin Roth <martinroth@google.com> | 2016-01-14 19:17:01 +0100 |
commit | 45a221de7923d6c1d52f9ca14a3419e7d0803636 (patch) | |
tree | e3f742125a2939b6a035720ccb2b5820934b375c /src/arch/riscv/Kconfig | |
parent | baf00e6b28efcf02497a566fa6f0f43d11304406 (diff) | |
download | coreboot-45a221de7923d6c1d52f9ca14a3419e7d0803636.tar.xz |
soc/braswell: Fix P-state table
Incorrect bus-core-ratio been used to generate P-state table
Original-Reviewed-on: https://chromium-review.googlesource.com/290681
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I4a34ec80ff3f2ed46dc074c9f8fe06756db8b357
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/12731
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/arch/riscv/Kconfig')
0 files changed, 0 insertions, 0 deletions