diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-09-05 13:31:14 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-09 19:35:42 +0000 |
| commit | 956c4f2d4cfa2b43085b493e0c5fed2f61cf5363 (patch) | |
| tree | 21155deec46c78623c1179f5b10defcd14f49e4a /src/arch/riscv/Makefile.inc | |
| parent | dde7629e9cccf7b3a9b2e468ac8439f91d13cf97 (diff) | |
| download | coreboot-956c4f2d4cfa2b43085b493e0c5fed2f61cf5363.tar.xz | |
x86: link romstage and ramstage with 1 file
To reduce file clutter merge romstage.ld and ramstage.ld
into a single memlayout.ld. The naming is consistent with
other architectures and chipsets for their linker script
names. The cache-as-ram linking rules are put into a separate
file such that other rules can be applied for future verstage
support.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built rambi and dmp/vortex86ex.
Change-Id: I1e8982a6a28027566ddd42a71b7e24e2397e68d2
Signed-off-by: Aaron Durbin <adubin@chromium.org>
Reviewed-on: http://review.coreboot.org/11521
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/riscv/Makefile.inc')
0 files changed, 0 insertions, 0 deletions