summaryrefslogtreecommitdiff
path: root/src/arch/riscv/bootblock.S
diff options
context:
space:
mode:
authorRonald G. Minnich <rminnich@gmail.com>2017-01-15 17:40:51 +0100
committerRonald G. Minnich <rminnich@gmail.com>2017-01-16 00:26:08 +0100
commit6f3a53b6f61126f05db950e1c0a2c0b4f1552e5f (patch)
treed2d9e98c7abed0b671d3d7d57f1d129f59256f6e /src/arch/riscv/bootblock.S
parenta19d44d2764be4dba55cad96abea12d92c8e1f0d (diff)
downloadcoreboot-6f3a53b6f61126f05db950e1c0a2c0b4f1552e5f.tar.xz
riscv: get SBI calls to work
SBI calls, as it turned out, were never right. They did not set the stack correctly on traps. They were not correctly setting the MIP instead of the SIP (although this was not really well documented). On Harvey, we were trying to avoid using them, and due to a bug in SPIKE, our avoidance worked. Once SPIKE was fixed, our avoidance broke. This set of changes is tested and working with Harvey which, for the first time, is making SBI calls. It's not pretty and we're going to want to rework trap_util.S in coming days. Change-Id: Ibef530adcc58d33e2c44ff758e0b7d2acbdc5e99 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/18097 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/riscv/bootblock.S')
-rw-r--r--src/arch/riscv/bootblock.S14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S
index c54c0e235c..43bca907bb 100644
--- a/src/arch/riscv/bootblock.S
+++ b/src/arch/riscv/bootblock.S
@@ -16,6 +16,7 @@
*/
#include <arch/encoding.h>
+#include <mcall.h>
.section ".text._start", "ax", %progbits
@@ -30,8 +31,14 @@ _start:
# and the stack must be page-aligned.
la sp, _estack
+ # poison the stack
+ la t1, _stack
+ li t0, 0xdeadbeef
+ sd t0, 0(t1)
+
# make room for HLS and initialize it
- addi sp, sp, -64 // MENTRY_FRAME_SIZE
+ addi sp, sp, -HLS_SIZE
+
// Once again, the docs and toolchain disagree.
// Rather than get fancy I'll just lock this down
// until it all stabilizes.
@@ -39,11 +46,6 @@ _start:
csrr a0, 0xf14
call hls_init
- # poison the stack
- la t1, _stack
- li t0, 0xdeadbeef
- sd t0, 0(t1)
-
la t0, trap_entry
csrw mtvec, t0