riscv: add physical memory protection (PMP) support

These codes are written by me based on the privileged instruction set.
I tested it by qemu/riscv-probe.

Change-Id: I2e9e0c94e6518f63ade7680a3ce68bacfae219d4
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/28569
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 31 insertions, 0 deletions

diff --git a/src/arch/riscv/include/arch/pmp.h b/src/arch/riscv/include/arch/pmp.h
new file mode 100644
index 0000000000..f671c0297b
--- /dev/null
+++ b/src/arch/riscv/include/arch/pmp.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 HardenedLinux
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RISCV_PMP_H__
+#define __RISCV_PMP_H__
+
+/*
+ * this function needs to be implemented by a specific SoC.
+ * return number of PMP entries for current hart
+ */
+extern int pmp_entries_num(void);
+
+/* reset PMP setting */
+void reset_pmp(void);
+
+/* set up PMP record */
+void setup_pmp(uintptr_t base, uintptr_t size, uintptr_t flags);
+
+#endif /* __RISCV_PMP_H__ */