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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-17 20:18:17 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-19 09:20:22 +0000 |
| commit | d50cf23e43bb2e54210b2e719bbf53002814926b (patch) | |
| tree | ae17611aeca5d7f941cac99d48a23ff9d92dee15 /src/arch/riscv/include | |
| parent | 253cd5a7e6e2a651c2b0b85ebb6e9103567cae31 (diff) | |
| download | coreboot-d50cf23e43bb2e54210b2e719bbf53002814926b.tar.xz | |
{cpu,drivers}/amd: Replace MTRR addresses with macros
Change-Id: I315c0b70c552c5dd7f640b18b913350bb88be81b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29173
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/include')
0 files changed, 0 insertions, 0 deletions