diff options
| author | Philipp Hug <philipp@hug.cx> | 2019-02-08 13:28:33 +0100 |
|---|---|---|
| committer | ron minnich <rminnich@gmail.com> | 2019-02-09 04:06:51 +0000 |
| commit | f813b84486228bdb1739ae58853f59aae08d8cc8 (patch) | |
| tree | 408d6211d6912b619fc82c857859256af319efb5 /src/arch/riscv/payload.c | |
| parent | 98ce3f8dadc3e84fbee4b141227c6acc79d4788f (diff) | |
| download | coreboot-f813b84486228bdb1739ae58853f59aae08d8cc8.tar.xz | |
riscv: Use correct argument in a1 when invoking payload
Fix a bug introduced by:
820dcfceb3901dbb00bb90c876e374126ca14e20
riscv: Simplify payload handling
Put fdt into a1 correctly.
Change-Id: I0dea7b88fde9d9a7365cb366917747d8110b9159
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/31287
Reviewed-by: ron minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/payload.c')
| -rw-r--r-- | src/arch/riscv/payload.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c index 8a07ff879f..f3ed5a44a6 100644 --- a/src/arch/riscv/payload.c +++ b/src/arch/riscv/payload.c @@ -44,7 +44,7 @@ void run_payload(struct prog *prog, void *fdt, int payload_mode) write_csr(mepc, doit); asm volatile( "mv a0, %0\n\t" - "mv a1, %0\n\t" + "mv a1, %1\n\t" "mret" ::"r"(hart_id), "r"(fdt) : "a0", "a1"); |