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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-08-17 14:54:02 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-05 14:59:09 +0000 |
| commit | b89ce2e1b4989557ba70780ceae165734fb17622 (patch) | |
| tree | 10c22a4bf9925b6a163a7ba4dc0ac1698ab03199 /src/arch/riscv/smp.c | |
| parent | d059bae29dc6701449badcb90efdffe632d40a0d (diff) | |
| download | coreboot-b89ce2e1b4989557ba70780ceae165734fb17622.tar.xz | |
inteltool: add Lewisburg C62x GPIOs support
These changes are in accordance with the documentation:
[*] page 361, Intel(R) C620 Series Chipset Platform Controller Hub
(PCH) Datasheet, May 2019. Document Number: 336067-007US
Tested on SUPERMICRO MBD-X11DPL-I-O and Intel S2600WF Wolf Pass
Change-Id: I43f8f3701de6ab7f89a78c2f5b939b5edd6d5b9d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/arch/riscv/smp.c')
0 files changed, 0 insertions, 0 deletions