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author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-10-12 00:18:00 +0200 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-10-15 00:25:33 +0200 |
commit | bebeb7497d693cac78e0d7ca5bcc9939b676a2e8 (patch) | |
tree | 960ae4305abd3d027a6067a562e7749ce7cc694d /src/arch/riscv | |
parent | e2e40cc17e393a5731ec8abdaae622e123f67d5d (diff) | |
download | coreboot-bebeb7497d693cac78e0d7ca5bcc9939b676a2e8.tar.xz |
arch/riscv: Remove unused bootblock_simple.c
Change-Id: Id30463d1809d0a31c9d3825642dce66f3ab2750d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16986
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r-- | src/arch/riscv/bootblock_simple.c | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/src/arch/riscv/bootblock_simple.c b/src/arch/riscv/bootblock_simple.c deleted file mode 100644 index db45ab202a..0000000000 --- a/src/arch/riscv/bootblock_simple.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/cache.h> -#include <arch/hlt.h> -#include <arch/stages.h> -#include <arch/exception.h> -#include <cbfs.h> -#include <console/console.h> -#include <program_loading.h> - -static int boot_cpu(void) -{ - /* - * FIXME: This is a stub for now. All non-boot CPUs should be - * waiting for an interrupt. We could move the chunk of assembly - * which puts them to sleep in here... - */ - return 1; -} - -void main(void) -{ - /* Globally disable MMU, caches, and branch prediction (these should - * be disabled by default on reset) */ - dcache_mmu_disable(); - - /* - * Re-enable icache and branch prediction. MMU and dcache will be - * set up later. - * - * Note: If booting from USB, we need to disable branch prediction - * before copying from USB into RAM (FIXME: why?) - */ - - if (boot_cpu()) { - //bootblock_cpu_init(); - //bootblock_mainboard_init(); - } - -#if IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE) - console_init(); - exception_init(); -#endif - - run_romstage(); -} |