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author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-08-27 00:07:58 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2016-08-29 18:01:27 +0200 |
commit | a1e39248692e659d0cdf397251a8c138d290d334 (patch) | |
tree | ef0d17a173701ebb0f3ef73f0f6f06ab6313e7be /src/arch/riscv | |
parent | dbf30678ee658fedca68a75277cd5c005d9833ef (diff) | |
download | coreboot-a1e39248692e659d0cdf397251a8c138d290d334.tar.xz |
arch/riscv: Add missing "break;"
Change-Id: Iea3f12a5a7eb37586f5424db2d7a84c4319492f8
Reported-by: Coverity (1361947)
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16335
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r-- | src/arch/riscv/trap_handler.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 29d5a0b28c..8120b66c06 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -35,6 +35,7 @@ void handle_supervisor_call(trapframe *tf) { /* TODO: parse the hardware-supplied config string and return the correct value */ returnValue = 1; + break; case SBI_ECALL_CONSOLE_PUT: returnValue = mcall_console_putchar(arg0); break; |