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| author | Antonello Dettori <dev@dettori.io> | 2016-06-22 21:09:08 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-24 20:48:12 +0200 |
| commit | e5f48d20e7d66471f182afe305fe073177722224 (patch) | |
| tree | f4a28f1a43ca733aca74d79ee7cff4787dd1b9c1 /src/arch/riscv | |
| parent | 5992afa57db4921f341bfdeb4bc796dfa6d0ae0e (diff) | |
| download | coreboot-e5f48d20e7d66471f182afe305fe073177722224.tar.xz | |
region: Add writeat and eraseat support
Implement writeat and eraseat support into the region_device_ops struct.
Change-Id: Iac2cf32e523d2f19ee9e5feefe1fba8c68982f3d
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15318
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/rom_media.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/rom_media.c b/src/arch/riscv/rom_media.c index 0c54e7abfd..c1713074f9 100644 --- a/src/arch/riscv/rom_media.c +++ b/src/arch/riscv/rom_media.c @@ -18,7 +18,7 @@ /* This assumes that the CBFS resides at 0x0, which is true for the default * configuration. */ static const struct mem_region_device boot_dev = - MEM_REGION_DEV_INIT(NULL, CONFIG_ROM_SIZE); + MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE); const struct region_device *boot_device_ro(void) { |