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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-11-24 08:25:29 +0100 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-12-06 18:48:28 +0100 |
| commit | fc5e6c6696b7c7f6af0311dbb0870602b12bed73 (patch) | |
| tree | bccce4d5102f51ac442afd5ed294444472da0cb3 /src/arch/riscv | |
| parent | ba571c79af41261bcb378aca343ddd2990da6d76 (diff) | |
| download | coreboot-fc5e6c6696b7c7f6af0311dbb0870602b12bed73.tar.xz | |
soc/ucb/riscv: Place CBMEM at top of autodetected RAM
Change-Id: Ida016aec11ccdb8da8d2ae1d30ddca16b069be11
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/17595
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions