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authorArthur Heymans <arthur@aheymans.xyz>2018-01-05 17:51:46 +0100
committerNico Huber <nico.h@gmx.de>2018-09-21 09:47:28 +0000
commit27d3f71f1d55f257390a51d0bd012cf133a763f6 (patch)
treee578c4cb402a6fa562336e3dddc57e7d2ec2c12a /src/arch/riscv
parent1f64e6aa85b0560b0cbc8b7f08970efa56d27d3a (diff)
downloadcoreboot-27d3f71f1d55f257390a51d0bd012cf133a763f6.tar.xz
soc/intel/skylake: Include some microcode blobs
This included the microcode for some CPUID's found in soc/intel/skylake/bootblock/report_platform.c (others are likely pre-release SKU's) The amount of FIT entries needed is currently 7 so setting CPU_INTEL_NUM_FIT_ENTRIES is set to a safe 10 will be able to fit them all. Change-Id: I3ba504a07b2697fe55ff8f28a934f761ae05a4ec Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23139 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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