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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2016-08-11 22:49:10 +0200
committerRonald G. Minnich <rminnich@gmail.com>2016-08-15 18:25:32 +0200
commit4d6ef3ab0155ba0d7717f22b5ea5042d2a3299f7 (patch)
tree28bf62f120bd47cf9c7ea87e2065b84b13a8dfbe /src/arch/riscv
parent28a3ee6d29738866594721c6dfc9ac25a9ef23d8 (diff)
downloadcoreboot-4d6ef3ab0155ba0d7717f22b5ea5042d2a3299f7.tar.xz
arch/riscv: Set the stack pointer upon trap entry
Change-Id: I52fae62bc6cf775179963720fbcfaa9e07f6a717 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/16017 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r--src/arch/riscv/trap_util.S12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 82a5629f4c..5ee0fddc53 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -116,7 +116,17 @@ supervisor_trap_entry:
.global trap_entry
trap_entry:
csrw mscratch, sp
- 1:addi sp,sp,-320
+
+ # SMP isn't supported yet, to avoid overwriting the same stack with different
+ # harts that handle traps at the same time.
+ csrr sp, mhartid
+.Lsmp_hang:
+ bnez sp, .Lsmp_hang
+
+ # TODO: Use the old stack pointer (plus an offset) for exceptions in machine
+ # mode, to avoid overwriting stack data.
+ li sp, 0x8000fff0
+
save_tf
move a0,sp
jal trap_handler