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| author | Ronald G. Minnich <rminnich@gmail.com> | 2016-04-08 12:41:29 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-04-08 22:35:23 +0200 |
| commit | 7bd886b503880a6f47a743446d6025812c3ab64e (patch) | |
| tree | f7bb586a05607332facbe7493ce75547534a96b4 /src/arch/riscv | |
| parent | bdd9df76379243bee5b5ba39f2f7034e31b8a762 (diff) | |
| download | coreboot-7bd886b503880a6f47a743446d6025812c3ab64e.tar.xz | |
Change la to li (load immediate)
This used to build, but will not with newer toolchains.
Change-Id: I0f397839eb85977ba18328b0e32040b15a6c3b0f
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/14296
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/bootblock.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S index 27c80ebd05..029e9e48a3 100644 --- a/src/arch/riscv/bootblock.S +++ b/src/arch/riscv/bootblock.S @@ -35,7 +35,7 @@ machine_handler: _start: // pending figuring out this f-ing toolchain. Hardcode what we know works. - la sp, 0x80FFF0 // stack start + stack size + li sp, 0x80FFF0 // stack start + stack size # make room for HLS and initialize it addi sp, sp, -64 // MENTRY_FRAME_SIZE @@ -43,7 +43,7 @@ _start: call hls_init //poison the stack - la t1, 0x800000 + li t1, 0x800000 li t0, 0xdeadbeef sd t0, 0(t1) |