diff options
| author | Xiang Wang <wxjstz@126.com> | 2018-07-19 16:33:59 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-31 10:07:57 +0000 |
| commit | d945621b5dbe59e6eea153a8f376c42ad3d6664c (patch) | |
| tree | a979d4b5eca0832c2171afa41a160a60a8867219 /src/arch/riscv | |
| parent | 5b7c6f52e6177100210dff5d066129e28d284331 (diff) | |
| download | coreboot-d945621b5dbe59e6eea153a8f376c42ad3d6664c.tar.xz | |
riscv: fix issues (timestrap & PRIu64)
When I tried to compile the RISC-V code (202e7d4f3c), I found some errors:
`PRIu64` is undefined
src/arch/riscv/timestamp.c does not exist
Currently RISC-V does not have the implementation and use of timestamp,
so I temporarily delete the code related to timestamp in the Makefile.
And define PRIu64.
Change-Id: I7f1a0793113bce7c1411e39f102cf20dbadda5d6
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/arch/riscv/include/stdint.h | 3 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index dab661eb8d..85bec43c50 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -3,6 +3,7 @@ ## This file is part of the coreboot project. ## ## Copyright (C) 2014 The ChromiumOS Authors +## Copyright (C) 2018 HardenedLinux ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -82,8 +83,6 @@ romstage-y += \ $(top)/src/lib/memmove.c \ $(top)/src/lib/memset.c -romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c - # Build the romstage $(objcbfs)/romstage.debug: $$(romstage-objs) @@ -116,8 +115,6 @@ ramstage-y += \ $(eval $(call create_class_compiler,rmodules,riscv)) -ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c - ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c # Build the ramstage diff --git a/src/arch/riscv/include/stdint.h b/src/arch/riscv/include/stdint.h index 446a1367e9..19808662eb 100644 --- a/src/arch/riscv/include/stdint.h +++ b/src/arch/riscv/include/stdint.h @@ -73,4 +73,7 @@ typedef uint8_t bool; typedef s64 intptr_t; typedef u64 uintptr_t; +/* FIXME: This is used in some print code and may be removed in the future. */ +#define PRIu64 "llu" + #endif /* RISCV_STDINT_H */ |