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authorXiang Wang <wxjstz@126.com>2018-07-08 10:13:52 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-07-12 11:53:30 +0000
commit3ec008bf40613776173251652c8c33d563299d73 (patch)
tree929ec9a9977f9519d1c26a4ce95de60b8f76dd6f /src/arch/riscv
parent6e3cc8855b9364f0097187936d19ec201a2b20c8 (diff)
downloadcoreboot-3ec008bf40613776173251652c8c33d563299d73.tar.xz
riscv: add include/arch/smp/ directory
Replicate directory layout from x86 for SMP. Change-Id: I27aee55f24d96ba9e7d8f2e6653f6c9c5e85c66a Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/27355 Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r--src/arch/riscv/include/arch/smp/atomic.h (renamed from src/arch/riscv/include/atomic.h)77
-rw-r--r--src/arch/riscv/include/arch/smp/spinlock.h12
-rw-r--r--src/arch/riscv/include/mcall.h1
-rw-r--r--src/arch/riscv/mcall.c1
4 files changed, 61 insertions, 30 deletions
diff --git a/src/arch/riscv/include/atomic.h b/src/arch/riscv/include/arch/smp/atomic.h
index 15702e445f..de7fd19bd3 100644
--- a/src/arch/riscv/include/atomic.h
+++ b/src/arch/riscv/include/arch/smp/atomic.h
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013, The Regents of the University of California (Regents).
+ * Copyright (c) 2018, HardenedLinux.
* All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,38 +31,58 @@
#include <arch/encoding.h>
+typedef struct { volatile int counter; } atomic_t;
+
#define disable_irqsave() clear_csr(mstatus, MSTATUS_MIE)
#define enable_irqrestore(flags) set_csr(mstatus, (flags) & MSTATUS_MIE)
-typedef struct { int lock; } spinlock_t;
-#define SPINLOCK_INIT {0}
-
-#define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)
-#define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))
+#define atomic_set(v, val) ((v)->counter = (val))
+#define atomic_read(v) ((v)->counter)
#ifdef __riscv_atomic
-# define atomic_add(ptr, inc) __sync_fetch_and_add(ptr, inc)
-# define atomic_swap(ptr, swp) __sync_lock_test_and_set(ptr, swp)
-# define atomic_cas(ptr, cmp, swp) __sync_val_compare_and_swap(ptr, cmp, swp)
+# define atomic_add(v, inc) __sync_fetch_and_add(&((v)->counter), inc)
+# define atomic_swap(v, swp) __sync_lock_test_and_set(&((v)->counter), swp)
+# define atomic_cas(v, cmp, swp) __sync_val_compare_and_swap(&((v)->counter), \
+ cmp, swp)
+# define atomic_inc(v) atomic_add(v, 1)
+# define atomic_dec(v) atomic_add(v, -1)
#else
-# define atomic_add(ptr, inc) ({ \
- long flags = disable_irqsave(); \
- typeof(ptr) res = *(volatile typeof(ptr))(ptr); \
- *(volatile typeof(ptr))(ptr) = res + (inc); \
- enable_irqrestore(flags); \
- res; })
-# define atomic_swap(ptr, swp) ({ \
- long flags = disable_irqsave(); \
- typeof(*ptr) res = *(volatile typeof(ptr))(ptr); \
- *(volatile typeof(ptr))(ptr) = (swp); \
- enable_irqrestore(flags); \
- res; })
-# define atomic_cas(ptr, cmp, swp) ({ \
- long flags = disable_irqsave(); \
- typeof(ptr) res = *(volatile typeof(ptr))(ptr); \
- if (res == (cmp)) *(volatile typeof(ptr))(ptr) = (swp); \
- enable_irqrestore(flags); \
- res; })
-#endif
+static inline int atomic_add(atomic_t *v, int inc)
+{
+ long flags = disable_irqsave();
+ int res = v->counter;
+ v->counter += inc;
+ enable_irqrestore(flags);
+ return res;
+}
+
+static inline int atomic_swap(atomic_t *v, int swp)
+{
+ long flags = disable_irqsave();
+ int res = v->counter;
+ v->counter = swp;
+ enable_irqrestore(flags);
+ return res;
+}
+
+static inline int atomic_cas(atomic_t *v, int cmp, int swp)
+{
+ long flags = disable_irqsave();
+ int res = v->counter;
+ v->counter = (res == cmp ? swp : res);
+ enable_irqrestore(flags);
+ return res;
+}
+
+static inline int atomic_inc(atomic_t *v)
+{
+ return atomic_add(v, 1);
+}
+
+static inline int atomic_dec(atomic_t *v)
+{
+ return atomic_add(v, -1);
+}
+#endif //__riscv_atomic
-#endif
+#endif //_RISCV_ATOMIC_H
diff --git a/src/arch/riscv/include/arch/smp/spinlock.h b/src/arch/riscv/include/arch/smp/spinlock.h
new file mode 100644
index 0000000000..bdf8ec4584
--- /dev/null
+++ b/src/arch/riscv/include/arch/smp/spinlock.h
@@ -0,0 +1,12 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h
index e4bc36f080..114808aae7 100644
--- a/src/arch/riscv/include/mcall.h
+++ b/src/arch/riscv/include/mcall.h
@@ -26,7 +26,6 @@
#ifndef __ASSEMBLER__
#include <arch/encoding.h>
-#include <atomic.h>
#include <stdint.h>
typedef struct {
diff --git a/src/arch/riscv/mcall.c b/src/arch/riscv/mcall.c
index 030accfe1d..2e44fb76fe 100644
--- a/src/arch/riscv/mcall.c
+++ b/src/arch/riscv/mcall.c
@@ -27,7 +27,6 @@
#include <arch/barrier.h>
#include <arch/errno.h>
-#include <atomic.h>
#include <console/console.h>
#include <mcall.h>
#include <string.h>