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| author | Andre Heider <a.heider@gmail.com> | 2018-02-15 18:15:17 +0100 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2018-02-20 20:39:33 +0000 |
| commit | feefcca601ce54450fc849d337b82193566ce272 (patch) | |
| tree | bfaa1fc5c7e9134b4de50a71db7fe598e957613a /src/arch/riscv | |
| parent | 92712d361d0ecdd33d5fb097630b0b61e96ab5bd (diff) | |
| download | coreboot-feefcca601ce54450fc849d337b82193566ce272.tar.xz | |
soc/nvidia/tegra210: add missing bl31 params to ATF config
The ATF tegra210 platform supports more than the currently used
'tzdram_size' parameter, see plat/nvidia/tegra/include/tegra_private.h
in the ATF tree.
Add the missing parameters and set them accordingly. The passed UART id
is based on CONFIG_CONSOLE_SERIAL_TEGRA210_UARTx, so ATF now uses the
same port for console output as coreboot.
Successfully tested with UARTB.
Change-Id: I7a47647216a154894e6c2c1fd3b304e18e85c6a5
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-on: https://review.coreboot.org/23783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions