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author | Stefan Reinauer <reinauer@chromium.org> | 2012-10-15 13:38:09 -0700 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-11-12 17:10:20 +0100 |
commit | 2a6f390d11daa41e7a85aa1bdbf837fe22854bfc (patch) | |
tree | 59b41e7d1412549ffc145f31b4714a39a3663337 /src/arch/x86/Kconfig | |
parent | d4bc0679540842d78712b41707c2da9f3d7ae204 (diff) | |
download | coreboot-2a6f390d11daa41e7a85aa1bdbf837fe22854bfc.tar.xz |
Add dependency for CONFIG_AP_IN_SIPI_WAIT
Change-Id: Ia20c138dae1fc1382abe74303e1117472c513d1d
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1779
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/x86/Kconfig')
-rw-r--r-- | src/arch/x86/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 7e0d195548..0233f1eb3c 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -6,7 +6,7 @@ menu "Architecture (x86)" config AP_IN_SIPI_WAIT bool default n - depends on ARCH_X86 + depends on ARCH_X86 && SMP # Aligns 16bit entry code in bootblock so that hyper-threading CPUs # can boot AP CPUs to enable their shared caches. |