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authorAaron Durbin <adurbin@chromium.org>2018-04-20 01:39:30 -0600
committerAaron Durbin <adurbin@chromium.org>2018-04-26 15:17:08 +0000
commit4b032e457f1377fc06d12214b0450eae48653565 (patch)
treedcf00137ed645aba00a2721b2d75bc46afcb7d8f /src/arch/x86/Kconfig
parente74ba1984dc545c7199c1e90b9ffaa33a44bee5e (diff)
downloadcoreboot-4b032e457f1377fc06d12214b0450eae48653565.tar.xz
arch/x86: allow idt to be available to link in all stages
Add Kconfig IDT_IN_EVERY_STAGE to optionally specify having the interrupt handling code available to all stages. In order to do this the idt setup is moved to a C module. The vecX entries are made global so that a table of references to all the interrupt vector entry points can be used to dynamically initialize the idt. The ramification for ramstage is that exceptions are initialized later (lib/hardwaremain.c). Not all stages initialize exceptions when this Kconfig variable is selected, but bootblock for the C, stages using assembly_entry.S, and of course ramstage do. Anything left out just needs a call to exception_init() at the right location. BUG=b:72728953 Change-Id: I4146a040e5e43bed7ccc6cb0a7dc2271f1e7b7fa Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25761 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/x86/Kconfig')
-rw-r--r--src/arch/x86/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index d7f144e179..1facfb9420 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -302,3 +302,10 @@ config NUM_CAR_PAGE_TABLE_PAGES
depends on PAGING_IN_CACHE_AS_RAM
help
The number of 4KiB pages that should be pre-allocated for page tables.
+
+# Provide the interrupt handlers to every stage. Not all
+# stages may take advantage.
+config IDT_IN_EVERY_STAGE
+ bool
+ default n
+ depends on ARCH_X86