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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-07-20 00:11:21 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-09-05 03:40:47 +0200
commit00b579a4478431dbfcef154ec80f5aa7d08d6529 (patch)
tree10ebe6f9b87dbf6dfc0f05a830da48060dad4b41 /src/arch/x86/Makefile.inc
parenteb1d39bac4d3638d41fc38274ae7a133d7b5c6f2 (diff)
downloadcoreboot-00b579a4478431dbfcef154ec80f5aa7d08d6529.tar.xz
buildsystem: Make CPU microcode updating more configurable
This patch aims to improve the microcode in CBFS handling that was brought by the last patches from Stefan and the Chromium team. Choices in Kconfig - 1) Generate microcode from tree (default) - 2) Include external microcode file - 3) Do not put microcode in CBFS The idea is to give the user full control over including non-free blobs in the final ROM image. MICROCODE_INCLUDE_PATH Kconfig variable is eliminated. Microcode is handled by a special class, cpu_microcode, as such: cpu_microcode-y += microcode_file.c MICROCODE_IN_CBFS should, in the future, be eliminated. Right now it is needed by intel microcode updating. Once all intel cpus are converted to cbfs updating, this variable can go away. These files are then compiled and assembled into a binary CBFS file. The advantage of doing it this way versus the current method is that 1) The rule is CPU-agnostic 2) Gives user more control over if and how to include microcode blobs 3) The rules for building the microcode binary are kept in src/cpu/Makefile.inc, and thus would not clobber the other makefiles, which are already overloaded and very difficult to navigate. Change-Id: I38d0c9851691aa112e93031860e94895857ebb76 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/1245 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/arch/x86/Makefile.inc')
-rw-r--r--src/arch/x86/Makefile.inc28
1 files changed, 12 insertions, 16 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 810e168895..c58f3be1b7 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -1,6 +1,8 @@
+################################################################################
##
## This file is part of the coreboot project.
##
+## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
## Copyright (C) 2009-2010 coresystems GmbH
## Copyright (C) 2009 Ronald G. Minnich
##
@@ -17,8 +19,8 @@
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+################################################################################
-#######################################################################
# Take care of subdirectories
subdirs-y += boot
# subdirs-y += init
@@ -34,13 +36,7 @@ cmos_layout.bin-type = 0x01aa
OPTION_TABLE_H:=$(obj)/option_table.h
endif
-ifeq ($(CONFIG_MICROCODE_IN_CBFS),y)
-cbfs-files-y += microcode_blob.bin
-microcode_blob.bin-file = $(obj)/microcode_blob.bin
-microcode_blob.bin-type = 0x53
-endif
-
-#######################################################################
+################################################################################
# Build the final rom image
COREBOOT_ROM_DEPENDENCIES:=
ifeq ($(CONFIG_PAYLOAD_ELF),y)
@@ -125,7 +121,7 @@ cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
bootsplash.jpg-type := bootsplash
-#######################################################################
+################################################################################
# i386 specific tools
NVRAMTOOL:=$(objutil)/nvramtool/nvramtool
@@ -137,7 +133,7 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l
@printf " OPTION $(subst $(obj)/,,$(@))\n"
$(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -L $@
-#######################################################################
+################################################################################
# Common recipes for all stages
$(objcbfs)/%.bin: $(objcbfs)/%.elf
@@ -152,7 +148,7 @@ $(objcbfs)/%.elf: $(objcbfs)/%.debug
$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
mv $@.tmp $@
-#######################################################################
+################################################################################
# Build the coreboot_ram (stage 2)
$(objcbfs)/coreboot_ram.debug: $(objgenerated)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld
@@ -176,7 +172,7 @@ $(objgenerated)/ramstage.a: $$(ramstage-objs)
rm -f $@
$(AR) cr $@ $^
-#######################################################################
+################################################################################
# Ramstage for AP CPU (AMD K8, obsolete?)
$(objcbfs)/coreboot_ap.debug: $(objgenerated)/coreboot_ap.o $(src)/arch/x86/init/ldscript_apc.lb
@@ -187,7 +183,7 @@ $(objgenerated)/coreboot_ap.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
-#######################################################################
+################################################################################
# done
crt0s = $(src)/arch/x86/init/prologue.inc
@@ -268,7 +264,7 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
endif
-#######################################################################
+################################################################################
# Build the final rom image
$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL)
@@ -278,7 +274,7 @@ $(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL
$(CONFIG_CBFS_PREFIX)/romstage x $(shell cat $(objcbfs)/base_xip.txt)
mv $@.tmp $@
-#######################################################################
+################################################################################
# Build the bootblock
bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
@@ -335,7 +331,7 @@ else
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $<
endif
-#######################################################################
+################################################################################
# Build the romstage
$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld