diff options
author | Aaron Durbin <adurbin@chromium.org> | 2018-04-20 01:39:30 -0600 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-26 15:17:08 +0000 |
commit | 4b032e457f1377fc06d12214b0450eae48653565 (patch) | |
tree | dcf00137ed645aba00a2721b2d75bc46afcb7d8f /src/arch/x86/Makefile.inc | |
parent | e74ba1984dc545c7199c1e90b9ffaa33a44bee5e (diff) | |
download | coreboot-4b032e457f1377fc06d12214b0450eae48653565.tar.xz |
arch/x86: allow idt to be available to link in all stages
Add Kconfig IDT_IN_EVERY_STAGE to optionally specify having
the interrupt handling code available to all stages. In order
to do this the idt setup is moved to a C module. The vecX
entries are made global so that a table of references to all
the interrupt vector entry points can be used to dynamically
initialize the idt. The ramification for ramstage is that
exceptions are initialized later (lib/hardwaremain.c). Not
all stages initialize exceptions when this Kconfig variable
is selected, but bootblock for the C, stages using
assembly_entry.S, and of course ramstage do. Anything left
out just needs a call to exception_init() at the right
location.
BUG=b:72728953
Change-Id: I4146a040e5e43bed7ccc6cb0a7dc2271f1e7b7fa
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25761
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/x86/Makefile.inc')
-rw-r--r-- | src/arch/x86/Makefile.inc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index b8cf3a6493..07bef93453 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -92,6 +92,8 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y) bootblock-y += boot.c bootblock-y += cpu_common.c +bootblock-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c +bootblock-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S bootblock-y += memcpy.c bootblock-y += memset.c bootblock-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c @@ -169,6 +171,8 @@ endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64 ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y) verstage-y += boot.c +verstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c +verstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S verstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c verstage-y += memset.c @@ -206,6 +210,8 @@ romstage-y += cbmem.c romstage-y += cbfs_and_run.c romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c romstage-$(CONFIG_EARLY_EBDA_INIT) += ebda.c +romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c +romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S romstage-y += memcpy.c romstage-y += memmove.c romstage-y += memset.c @@ -281,6 +287,8 @@ postcar-y += cbfs_and_run.c postcar-y += cbmem.c postcar-y += cpu_common.c postcar-$(CONFIG_EARLY_EBDA_INIT) += ebda.c +postcar-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c +postcar-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S postcar-y += exit_car.S postcar-y += memcpy.c postcar-y += memmove.c @@ -343,6 +351,8 @@ ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S ramstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S +smm-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c +smm-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S smm-y += memcpy.c smm-y += memmove.c smm-y += memset.c |