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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2018-03-21 16:48:53 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-28 15:14:42 +0000 |
| commit | 5dff396befca2241f8323b422cbf6cc5b66a7488 (patch) | |
| tree | ab023988a647046de152cee0c90f871b981e8c09 /src/arch/x86/acpi.c | |
| parent | 216345dd2480cf30df4e3ec8f323ce75f30e222e (diff) | |
| download | coreboot-5dff396befca2241f8323b422cbf6cc5b66a7488.tar.xz | |
acpi: Hide Chrome and coreboot specific devices
Some ACPI interfaces introduced by Chrome or coreboot do not
need drivers outside ChromeOS, for example Chrome EC or
coreboot table; or will be probed by direct ACPI calls (instead
of trying to find drivers by device IDs).
These interfaces should be set to hidden so non-ChromeOS systems,
for example Windows, won't have problem finding driver.
Interfaces changed:
- coreboot (BOOT0000), only used by Chrome OS / Linux kernel.
- Chrome OS EC
- Chrome OS EC PD
- Chrome OS TBMC
- Chrome OS RAMoops
BUG=b:72200466
BRANCH=eve
TEST=Boot into non-ChromeOS systems (for example Windows)
and checked ACPI devices on UI.
Change-Id: I9786cf9ee07b2c3f11509850604f2bfb3f3e710a
Signed-off-by: David Wu <David_Wu@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1078211
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Trybot-Ready: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/28333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86/acpi.c')
| -rw-r--r-- | src/arch/x86/acpi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index 012fe186e7..0701bbe8fb 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -324,7 +324,7 @@ static void acpi_ssdt_write_cbtable(void) acpigen_write_device("CTBL"); acpigen_write_coreboot_hid(COREBOOT_ACPI_ID_CBTABLE); acpigen_write_name_integer("_UID", 0); - acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON); + acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); acpigen_write_name("_CRS"); acpigen_write_resourcetemplate_header(); acpigen_write_mem32fixed(0, base, size); |