diff options
author | Furquan Shaikh <furquan@chromium.org> | 2017-02-20 22:56:25 -0800 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2017-02-22 22:19:29 +0100 |
commit | bf4845dd3acf3ce9e9c63ce8c35ee7111351aa78 (patch) | |
tree | e52477aefc418a91583ac5568af23972747badc8 /src/arch/x86/acpigen.c | |
parent | 5b9b593f2f888c81cc0af8eb2fc2173c83562003 (diff) | |
download | coreboot-bf4845dd3acf3ce9e9c63ce8c35ee7111351aa78.tar.xz |
arch/x86/acpigen: Provide helper functions for enabling/disabling GPIO
In order to allow GPIOs to be set/clear according to their polarity,
provide helper functions that check for polarity and call set/clear
SoC functions for generating ACPI code.
BUG=None
BRANCH=None
TEST=Verified that the ACPI code generated remains the same as before
for reef.
Change-Id: Ie8bdb9dc18e61a4a658f1447d6f1db0b166d9c12
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18427
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/x86/acpigen.c')
-rw-r--r-- | src/arch/x86/acpigen.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c index 8ebdd0982c..d3ec05fe3d 100644 --- a/src/arch/x86/acpigen.c +++ b/src/arch/x86/acpigen.c @@ -1299,3 +1299,26 @@ int __attribute__((weak)) acpigen_soc_clear_tx_gpio(unsigned int gpio_num) acpigen_write_debug_string("clear_tx_gpio not available"); return -1; } + +/* + * Helper functions for enabling/disabling Tx GPIOs based on the GPIO + * polarity. These functions end up calling acpigen_soc_{set,clear}_tx_gpio to + * make callbacks into SoC acpigen code. + * + * Returns 0 on success and -1 on error. + */ +int acpigen_enable_tx_gpio(struct acpi_gpio *gpio) +{ + if (gpio->polarity == ACPI_GPIO_ACTIVE_HIGH) + return acpigen_soc_set_tx_gpio(gpio->pins[0]); + else + return acpigen_soc_clear_tx_gpio(gpio->pins[0]); +} + +int acpigen_disable_tx_gpio(struct acpi_gpio *gpio) +{ + if (gpio->polarity == ACPI_GPIO_ACTIVE_LOW) + return acpigen_soc_set_tx_gpio(gpio->pins[0]); + else + return acpigen_soc_clear_tx_gpio(gpio->pins[0]); +} |