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authorStefan Reinauer <stefan.reinauer@coreboot.org>2015-03-15 19:23:50 +0100
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-06-16 02:47:41 +0200
commit181b77324f9b15e66479ac150a644c3b6cb72c12 (patch)
tree168549fb599ae05cf31db3e64e8feb4303bf9ce9 /src/arch/x86/boot
parent6867120a8018d93df99dae6fb69e3789f112bb1b (diff)
downloadcoreboot-181b77324f9b15e66479ac150a644c3b6cb72c12.tar.xz
x86: Make x86 architecture makefiles x64 aware
Almost all of the code between x86 and x64 can be shared, so select it for either architecture. Change-Id: I681149ed7698c08b702bb19f074f369699cef1bf Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/8693 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/x86/boot')
-rw-r--r--src/arch/x86/boot/Makefile.inc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index 7810ba8368..10a1efd242 100644
--- a/src/arch/x86/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -1,12 +1,12 @@
-ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
romstage-y += cbmem.c
romstage-y += boot.c
-endif # CONFIG_ARCH_ROMSTAGE_X86_32
+endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
-ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
ramstage-y += boot.c
ramstage-y += gdt.c
@@ -19,4 +19,4 @@ ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
-endif # CONFIG_ARCH_RAMSTAGE_X86_32
+endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64