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author | Duncan Laurie <dlaurie@chromium.org> | 2012-07-16 12:11:53 -0700 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-26 20:31:52 +0200 |
commit | 0eefa005030a70f5c691155b931bb778ad1fb2ae (patch) | |
tree | a35355b720a90d13223939b3abc5f6a7658075f0 /src/arch/x86/boot | |
parent | 10d31aba76a0a0fd3fd79d32698c2634a4293add (diff) | |
download | coreboot-0eefa005030a70f5c691155b931bb778ad1fb2ae.tar.xz |
ACPI: Add function to write _PPC using NVS
The existing NVS variable for PPCM will be used to
select a dynamic max P-state.
By itself this does not change existing behavior because
the NVS PPCM variable is initialized to zero.
PPCM can be tested by building and booting a modified BIOS
that sets gnvs->ppcm to a value greater than 1 and checking
from the OS that the P-state is limited to that value.
Change-Id: Ia7b3bbc6b84c1aa42349bb236abee5cc92486561
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1341
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/x86/boot')
-rw-r--r-- | src/arch/x86/boot/acpigen.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/arch/x86/boot/acpigen.c b/src/arch/x86/boot/acpigen.c index 71aa10cd17..47845a01a6 100644 --- a/src/arch/x86/boot/acpigen.c +++ b/src/arch/x86/boot/acpigen.c @@ -396,6 +396,32 @@ int acpigen_write_PPC(u8 nr) return len; } +/* generates a func with max supported P states */ +int acpigen_write_PPC_NVS(void) +{ +/* + Method (_PPC, 0, NotSerialized) + { + Return (PPCM) + } +*/ + int len; + /* method op */ + acpigen_emit_byte(0x14); + len = acpigen_write_len_f(); + len += acpigen_emit_namestring("_PPC"); + /* no fnarg */ + acpigen_emit_byte(0x00); + /* return */ + acpigen_emit_byte(0xa4); + /* arg */ + len += acpigen_emit_namestring("PPCM"); + /* add all single bytes */ + len += 3; + acpigen_patch_len(len - 1); + return len; +} + int acpigen_write_TPC(const char *gnvs_tpc_limit) { /* |